Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35170 )
Change subject: soc/skylake: Write the P2SB IBDF and HBDF registers in coreboot ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35170/3/src/soc/intel/skylake/bootb... File src/soc/intel/skylake/bootblock/pch.c:
https://review.coreboot.org/c/coreboot/+/35170/3/src/soc/intel/skylake/bootb... PS3, Line 59: pci_write_config16(PCH_DEV_P2SB, PCH_P2SB_HBDF, V_DEFAULT_HBDF); Ack, will do.
Yeah, your comments are actually just rephrasing the code (the worst kind of comments, beside lies, imho). What is really needed is the information that it's done early because FSP hides the device. Either in a comment or at least the commit message
Just wanted to state that useless wastes of space are less bad than misleading information :D Still bad, though. Will take care.