[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Add config for sata devslp pad reset configuration

[Aamir Bohra (Code Review)]

Hello Patrick Rudolph, Subrata Banik, Tim Wawrzynczak, build bot (Jenkins), Furquan Shaikh,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/35306

to look at the new patch set (#4).

Change subject: soc/intel/cannonlake: Add config for sata devslp pad reset configuration
......................................................................

soc/intel/cannonlake: Add config for sata devslp pad reset configuration

CML FSP now provides a provision to configure the SATA devslp
GPIO pad reset configuration. This config would help set the
the required pad reset configuration.

BUG=b:133000685

Change-Id: I4eaea9c6da67f1274ad3e392046a68cddc1b99b6
Signed-off-by: Aamir Bohra 
---
M src/soc/intel/cannonlake/chip.h
M src/soc/intel/cannonlake/fsp_params.c
2 files changed, 15 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/35306/4