[coreboot-gerrit] Change in coreboot[master]: cpu/intel/model_1067x: enable PECI

[Arthur Heymans (Code Review)]

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45184 )

Change subject: cpu/intel/model_1067x: enable PECI
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Patch Set 1: Code-Review+2

(1 comment)

https://review.coreboot.org/c/coreboot/+/45184/1//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/45184/1//COMMIT_MSG@13 
PS1, Line 13: erratum AW67 "Enabling PECI via the PECI_CTL
            : MSR incorrectly writes CPUID_FEATURE_MASK1 MSR". The suggested
            : workaround is "Do not initialize PECI before processor update is
            : loaded". Since coreboot performs microcode updates before running this
            : code it should not cause any trouble. 
Maybe add this as a comment in the code to make sure that (although unlikely) future development keeps this after the microcode update?