Shaunak Saha has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39801 )
Change subject: soc/intel/tgl: Synchronize GPIO ASL table with Linux kernel ......................................................................
Patch Set 10:
(2 comments)
Patch Set 9: Code-Review+2
Looking at the patches upstream it seems the change in how gpio communities are reported was also a surprise to them. How is this decided at Intel?
Yes. There were lots of changes on the kernel side. Eventually we will go to the newer schema maybe in next silicon. But for TGL the change was too late to do proper validation so Intel decided to use the older schema.
https://review.coreboot.org/c/coreboot/+/39801/9//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39801/9//COMMIT_MSG@12 PS9, Line 12:
BUG=?
Done
https://review.coreboot.org/c/coreboot/+/39801/7/src/soc/intel/tigerlake/gpi... File src/soc/intel/tigerlake/gpio.c:
https://review.coreboot.org/c/coreboot/+/39801/7/src/soc/intel/tigerlake/gpi... PS7, Line 74: INTEL_GPP_BASE(GPP_C0, GPP_L_BKLTEN, GPP_MLK_RSTB, 320), /* GPP_HVCMOS */ : INTEL_GPP_BASE(GPP_C0, GPP_E0, GPP_E_CLK_LOOPBK, 352), /* GPP_E */
You will have to use INTEL_GPP for GPP_HVCMOS and GPP_JTAG. Also for GPP_SPI below. […]
Done