Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37331 )
Change subject: amd/agesa/family14: implement C bootblock ......................................................................
Patch Set 2:
(5 comments)
https://review.coreboot.org/c/coreboot/+/37331/1/src/northbridge/amd/agesa/K... File src/northbridge/amd/agesa/Kconfig:
https://review.coreboot.org/c/coreboot/+/37331/1/src/northbridge/amd/agesa/K... PS1, Line 20: select ROMCC_BOOTBLOCK
Already done with future rebase.
Done
https://review.coreboot.org/c/coreboot/+/37331/1/src/northbridge/amd/agesa/f... File src/northbridge/amd/agesa/family14/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/37331/1/src/northbridge/amd/agesa/f... PS1, Line 21: romstage-y += nb_util.c
When I setup a separate patch for the BIOSRAM for all AMD platforms, yes.
Done
https://review.coreboot.org/c/coreboot/+/37331/1/src/northbridge/amd/agesa/f... File src/northbridge/amd/agesa/family14/nb_util.c:
https://review.coreboot.org/c/coreboot/+/37331/1/src/northbridge/amd/agesa/f... PS1, Line 19: void *get_ap_entry_ptr(void)
I think we will have these two functions implemented in soc/amd/common. […]
Done
https://review.coreboot.org/c/coreboot/+/37331/1/src/northbridge/amd/agesa/f... File src/northbridge/amd/agesa/family15tn/Kconfig:
https://review.coreboot.org/c/coreboot/+/37331/1/src/northbridge/amd/agesa/f... PS1, Line 17: select ROMCC_BOOTBLOCK
Thank you, will align with that
Done
https://review.coreboot.org/c/coreboot/+/37331/1/src/northbridge/amd/agesa/f... File src/northbridge/amd/agesa/family16kb/Kconfig:
https://review.coreboot.org/c/coreboot/+/37331/1/src/northbridge/amd/agesa/f... PS1, Line 18: select ROMCC_BOOTBLOCK
as before
Done