[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Add FSP UPD TcssDma0En and TcssDma1En

[John Zhao (Code Review)]

Hello build bot (Jenkins), Wonkyu Kim, Caveh Jalali, Nick Vaccaro, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/41383

to look at the new patch set (#4).

Change subject: soc/intel/tigerlake: Add FSP UPD TcssDma0En and TcssDma1En
......................................................................

soc/intel/tigerlake: Add FSP UPD TcssDma0En and TcssDma1En

This adds FSP UPD TcssDma0En and TcssDma1En for configuration.

BUG=:b:146624360
TEST=Built and booted on Volteer.

Signed-off-by: John Zhao 
Change-Id: I04af970f74ab9dfe84f9c0c09ec2098e0093fa57
---
M src/soc/intel/tigerlake/chip.h
M src/soc/intel/tigerlake/include/soc/pci_devs.h
M src/soc/intel/tigerlake/romstage/fsp_params.c
3 files changed, 23 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/41383/4