Hello Patrick Rudolph, Huang Jin, Frans Hendriks, Lee Leahy, build bot (Jenkins), Nico Huber, Michał Żygowski, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32381
to look at the new patch set (#3).
Change subject: soc/intel/braswell: add default option to use public FSP ......................................................................
soc/intel/braswell: add default option to use public FSP
The current Braswell FSP 1.1 header in vendorcode/intel, for which there is no publicly available FSP binary, contains silicon init UPDs which are not found in the publicly available header/binary in the FSP Github repo. This prevents new boards from being added which use the public Braswell FSP header/binary.
To resolve this, move the UPDs not found in the public header from the soc's chip.c to ramstage.c for the boards which use them. Add a Kconfig option to use the current non-public FSP header and select it for boards which need it (google/cyan and intel/strago). Use the Kconfig option to set the FSP_HEADER_PATH to ensure the correct header is used.
Additionally, set the default path for the FSP binary when the public FSP is selected.
Test: build google/cyan with both public and non-public FSP options (adjusting Kconfig/ramstage.c to allow the former)
Change-Id: I43cf18b98c844175a87b61fdbe4b0b24484e5702 Signed-off-by: Matt DeVillier matt.devillier@gmail.com --- M src/drivers/intel/fsp1_1/Kconfig M src/mainboard/google/cyan/Kconfig M src/mainboard/google/cyan/Makefile.inc A src/mainboard/google/cyan/ramstage.c M src/mainboard/intel/strago/Kconfig M src/mainboard/intel/strago/ramstage.c M src/soc/intel/braswell/Kconfig M src/soc/intel/braswell/Makefile.inc M src/soc/intel/braswell/chip.c 9 files changed, 115 insertions(+), 33 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/32381/3