Attention is currently required from: Paul Menzel, Iru Cai. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46630 )
Change subject: mb/hp: Add EliteBook 820 G2 ......................................................................
Patch Set 8:
(11 comments)
File Documentation/mainboard/hp/elitebook_820_g2.md:
https://review.coreboot.org/c/coreboot/+/46630/comment/55cbeceb_64fa8530 PS8, Line 28: ## Programming Isn't most of this section similar to that of another laptop with Sure Start?
https://review.coreboot.org/c/coreboot/+/46630/comment/357518cd_7f33634c PS8, Line 115: (needs a modified refcode) Is this modification documented anywhere?
https://review.coreboot.org/c/coreboot/+/46630/comment/f8f14e2c_3e2c29d5 PS8, Line 119: - DisplayPort : - VGA How about using a single entry for all video outputs?
- Internal LCD, DisplayPort and VGA video outputs
I assume the internal LCD is working (can't see any mention of it)
File src/mainboard/hp/elitebook_820_g2/Kconfig:
https://review.coreboot.org/c/coreboot/+/46630/comment/9e765cdd_8536a8b3 PS8, Line 24: config VGA_BIOS_FILE : string : default "pci8086,1616.rom" Please remove this. The file doesn't exist in the coreboot tree.
File src/mainboard/hp/elitebook_820_g2/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/46630/comment/fe99a890_d5076e36 PS8, Line 14: 0x0 nit: 0
https://review.coreboot.org/c/coreboot/+/46630/comment/fed126f6_8ee35231 PS8, Line 20: 0x0 nit: 0
https://review.coreboot.org/c/coreboot/+/46630/comment/b04380b3_44af4f58 PS8, Line 34: register "pcie_port_coalesce" = "1" Is this needed? 1c.0 is on
https://review.coreboot.org/c/coreboot/+/46630/comment/e77e4f13_ebb91f65 PS8, Line 35: register "pcie_port_force_aspm" = "0" : register "sata_devslp_disable" = "0" : register "sata_devslp_mux" = "0" devicetree settings default to zero already, I'd omit these.
https://review.coreboot.org/c/coreboot/+/46630/comment/6195c2dc_f3141da2 PS8, Line 70: SlotDataBusWidth2X out of curiosity, how did you verify this?
https://review.coreboot.org/c/coreboot/+/46630/comment/c342711d_43c639f5 PS8, Line 73: device pci 1e.0 off end # PCI bridge Doesn't exist since Lynx Point, please remove
File src/mainboard/hp/elitebook_820_g2/pei_data.c:
https://review.coreboot.org/c/coreboot/+/46630/comment/bc9e11b1_5c699c4c PS8, Line 22: USB_PORT_BACK_PANEL); Put these on the previous line?