[coreboot-gerrit] [S] Change in coreboot[master]: mb/amd/birman,chausie: Enable SimNow capabilities

[Fred Reitberger (Code Review)]

Fred Reitberger has submitted this change. ( https://review.coreboot.org/c/coreboot/+/73165 )

Change subject: mb/amd/birman,chausie: Enable SimNow capabilities
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mb/amd/birman,chausie: Enable SimNow capabilities

Signed-off-by: Fred Reitberger 
Change-Id: Ia7e594ca2b6ea3cd9d6f60e7dcd1ba6ebabf85cb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73165
Tested-by: build bot (Jenkins) 
Reviewed-by: Felix Held 
---
M src/mainboard/amd/birman/Kconfig
M src/mainboard/amd/chausie/Kconfig
2 files changed, 21 insertions(+), 6 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Felix Held: Looks good to me, approved

diff --git a/src/mainboard/amd/birman/Kconfig b/src/mainboard/amd/birman/Kconfig
index 35c6f07..f9881e3 100644
--- a/src/mainboard/amd/birman/Kconfig
+++ b/src/mainboard/amd/birman/Kconfig
@@ -6,14 +6,15 @@
    def_bool y
    select BOARD_ROMSIZE_KB_16384	# Birman actually has a 32MiB ROM
    select EC_ACPI
-	select SOC_AMD_COMMON_BLOCK_USE_ESPI
-	select AMD_SOC_CONSOLE_UART
+	select SOC_AMD_COMMON_BLOCK_USE_ESPI if !SOC_AMD_COMMON_BLOCK_SIMNOW_BUILD
+	select AMD_SOC_CONSOLE_UART if !SOC_AMD_COMMON_BLOCK_SIMNOW_BUILD
    select MAINBOARD_HAS_CHROMEOS
    select PCIEXP_ASPM
    select PCIEXP_CLK_PM
    select PCIEXP_COMMON_CLOCK
    select PCIEXP_L1_SUB_STATE
-	select SOC_AMD_COMMON_BLOCK_ESPI_RETAIN_PORT80_EN
+	select SOC_AMD_COMMON_BLOCK_ESPI_RETAIN_PORT80_EN if !SOC_AMD_COMMON_BLOCK_SIMNOW_BUILD
+	select SOC_AMD_COMMON_BLOCK_SIMNOW_SUPPORTED

config FMDFILE
    default "src/mainboard/amd/birman/chromeos_glinda.fmd" if CHROMEOS && BOARD_AMD_BIRMAN_GLINDA
diff --git a/src/mainboard/amd/chausie/Kconfig b/src/mainboard/amd/chausie/Kconfig
index ad4d530..052d5d7 100644
--- a/src/mainboard/amd/chausie/Kconfig
+++ b/src/mainboard/amd/chausie/Kconfig
@@ -7,14 +7,15 @@
    select BOARD_ROMSIZE_KB_16384
    select EC_ACPI
    select SOC_AMD_MENDOCINO
-	select SOC_AMD_COMMON_BLOCK_USE_ESPI
-	select AMD_SOC_CONSOLE_UART
+	select SOC_AMD_COMMON_BLOCK_USE_ESPI if !SOC_AMD_COMMON_BLOCK_SIMNOW_BUILD
+	select AMD_SOC_CONSOLE_UART if !SOC_AMD_COMMON_BLOCK_SIMNOW_BUILD
    select MAINBOARD_HAS_CHROMEOS
    select PCIEXP_ASPM
    select PCIEXP_CLK_PM
    select PCIEXP_COMMON_CLOCK
    select PCIEXP_L1_SUB_STATE
-	select SOC_AMD_COMMON_BLOCK_ESPI_RETAIN_PORT80_EN
+	select SOC_AMD_COMMON_BLOCK_ESPI_RETAIN_PORT80_EN if !SOC_AMD_COMMON_BLOCK_SIMNOW_BUILD
+	select SOC_AMD_COMMON_BLOCK_SIMNOW_SUPPORTED

config FMDFILE
    default "src/mainboard/amd/chausie/chromeos.fmd" if CHROMEOS