[coreboot-gerrit] Change in coreboot[master]: util/intelp2m: Clean up SCI, SMI macro generation and update comments

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47314 )

Change subject: util/intelp2m: Clean up SCI, SMI macro generation and update comments
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util/intelp2m: Clean up SCI, SMI macro generation and update comments

Simplify macro generation and fix up "DEEP,EDGE_SINGLE" bug introduced
by commit 7bb756f (util/intelp2m: Update macros). Also update legacy
macro comments.

Change-Id: Ie49874d4abbdc7d1a18d63a62ccbce970ce78233
Signed-off-by: Benjamin Doron 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47314
Reviewed-by: Maxim Polyakov 
Tested-by: build bot (Jenkins) 
---
M util/intelp2m/platforms/snr/macro.go
1 file changed, 6 insertions(+), 24 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Maxim Polyakov: Looks good to me, approved

diff --git a/util/intelp2m/platforms/snr/macro.go b/util/intelp2m/platforms/snr/macro.go
index 43d373e..fb530c5 100644
--- a/util/intelp2m/platforms/snr/macro.go
+++ b/util/intelp2m/platforms/snr/macro.go
@@ -90,12 +90,12 @@
    macro.Add("_APIC")
    if dw0.GetRXLevelEdgeConfiguration() == common.TRIG_LEVEL {
    	if dw0.GetRxInvert() != 0 {
-			// PAD_CFG_GPI_APIC_INVERT(pad, pull, rst)
+			// PAD_CFG_GPI_APIC_LOW(pad, pull, rst)
    		macro.Add("_LOW")
    	} else {
+			// PAD_CFG_GPI_APIC_HIGH(pad, pull, rst)
    		macro.Add("_HIGH")
    	}
-		// PAD_CFG_GPI_APIC(pad, pull, rst)
    	macro.Add("(").Id().Pull().Rstsrc().Add("),")
    	return true
    }
@@ -123,18 +123,8 @@
    if dw0.GetGPIOInputRouteSCI() == 0 {
    	return false
    }
-	macro.Add("_SCI").Add("(").Id().Pull().Rstsrc()
-	if (dw0.GetRXLevelEdgeConfiguration() & common.TRIG_EDGE_SINGLE) == 0 {
-		macro.Trig()
-	}
-	// e.g. PAD_CFG_GPI_SCI(GPP_B18, UP_20K, PLTRST, LEVEL, INVERT),
-	if (dw0.GetRXLevelEdgeConfiguration() & common.TRIG_EDGE_SINGLE) != 0 {
-		// e.g. PAD_CFG_GPI_ACPI_SCI(GPP_G2, NONE, DEEP, YES),
-		// #define PAD_CFG_GPI_ACPI_SCI(pad, pull, rst, inv)	\
-		//             PAD_CFG_GPI_SCI(pad, pull, rst, EDGE_SINGLE, inv)
-		macro.Add(",").Add("EDGE_SINGLE")
-	}
-	macro.Invert().Add("),")
+	// PAD_CFG_GPI_SCI(GPP_B18, UP_20K, PLTRST, LEVEL, INVERT),
+	macro.Add("_SCI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
    return true
 }

@@ -145,16 +135,8 @@
    if dw0.GetGPIOInputRouteSMI() == 0 {
    	return false
    }
-	macro.Add("_SMI").Add("(").Id().Pull().Rstsrc()
-	if (dw0.GetRXLevelEdgeConfiguration() & common.TRIG_EDGE_SINGLE) != 0 {
-		// e.g. PAD_CFG_GPI_ACPI_SMI(GPP_I3, NONE, DEEP, YES),
-		macro.Add(",").Add("EDGE_SINGLE")
-	}
-	if (dw0.GetRXLevelEdgeConfiguration() & common.TRIG_EDGE_SINGLE) == 0 {
-		// e.g. PAD_CFG_GPI_SMI(GPP_E7, NONE, DEEP, LEVEL, NONE),
-		macro.Trig()
-	}
-	macro.Invert().Add("),")
+	// PAD_CFG_GPI_SMI(GPP_E7, NONE, DEEP, LEVEL, NONE),
+	macro.Add("_SMI").Add("(").Id().Pull().Rstsrc().Trig().Invert().Add("),")
    return true
 }