Wim Vervoorn has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38748 )
Change subject: soc/intel/common/block/lpc: Add support to allow all UART options ......................................................................
soc/intel/common/block/lpc: Add support to allow all UART options
The current implementation only allows 0x3f8 for COMA and 0x2f8 for COMB in the LPC decode.
Add the support to allow selection of all options supported by the PCH.
BUG=N/A TEST=build
Change-Id: Iad7bb0e44739e8d656a542c79af7f98a4e9bde69 Signed-off-by: Wim Vervoorn wvervoorn@eltan.com --- M src/soc/intel/common/block/lpc/Kconfig M src/soc/intel/common/block/lpc/lpc_def.h 2 files changed, 24 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/38748/1
diff --git a/src/soc/intel/common/block/lpc/Kconfig b/src/soc/intel/common/block/lpc/Kconfig index 41e72c4..b95e9be 100644 --- a/src/soc/intel/common/block/lpc/Kconfig +++ b/src/soc/intel/common/block/lpc/Kconfig @@ -11,3 +11,25 @@ help By default COMA range to LPC is enable. COMB range to LPC is optional and should select based on platform dedicated selection. + +config SOC_INTEL_COMMON_BLOCK_LPC_COMA_UART + int + prompt "Index for COMA UART" + depends on SOC_INTEL_COMMON_BLOCK_LPC && DRIVERS_UART_8250IO + default 0 + range 0 7 + help + Select an I/O port for COMA (Used to open LPC IO window) + 0 = 0x3f8, 1 = 0x2f8, 2 = 0x220, 3 = 0x228, + 4 = 0x238, 5 = 0x2e8, 6 = 0x338, 7 = 0x3e8 + +config SOC_INTEL_COMMON_BLOCK_LPC_COMB_UART + int + prompt "Index for COMB UART" if DRIVERS_UART_8250IO + depends on SOC_INTEL_COMMON_BLOCK_LPC && DRIVERS_UART_8250IO && SOC_INTEL_COMMON_BLOCK_LPC_COMB_ENABLE + default 1 + range 0 7 + help + Select an I/O port for COMB (Used to open LPC IO window) + 0 = 0x3f8, 1 = 0x2f8, 2 = 0x220, 3 = 0x228, + 4 = 0x238, 5 = 0x2e8, 6 = 0x338, 7 = 0x3e8 diff --git a/src/soc/intel/common/block/lpc/lpc_def.h b/src/soc/intel/common/block/lpc/lpc_def.h index 9a72580..7af235f 100644 --- a/src/soc/intel/common/block/lpc/lpc_def.h +++ b/src/soc/intel/common/block/lpc/lpc_def.h @@ -21,8 +21,8 @@ #define LPC_SCNT_EN (1 << 7) #define LPC_SCNT_MODE (1 << 6) #define LPC_IO_DECODE 0x80 -#define LPC_IOD_COMA_RANGE (0 << 0) /* 0x3F8 - 0x3FF COMA*/ -#define LPC_IOD_COMB_RANGE (1 << 4) /* 0x2F8 - 0x2FF COMB*/ +#define LPC_IOD_COMA_RANGE (CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_COMA_UART << 0) +#define LPC_IOD_COMB_RANGE (CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_COMB_UART << 4) /* Use IO_<peripheral>_<IO port> style macros defined in lpc_lib.h * to enable decoding of I/O locations for a peripheral. */ #define LPC_IO_ENABLES 0x82