Andrey Petrov has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38639 )
Change subject: soc/intel/common/systemagent: Add Kconfig guard ......................................................................
soc/intel/common/systemagent: Add Kconfig guard
Looks like selecting SOC_INTEL_COMMON force-sets MMCONF_BASE_ADDR to some value which can't be overriden outside of soc/intel/common. So adding a non-SoC platform thats uses code from soc/intel/common is not possible.
TEST=build test on wip platform
Change-Id: Ia160444e8ac7cac55153f659f4d98f4f77f0d467 Signed-off-by: Andrey Petrov anpetrov@fb.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/38639 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com Reviewed-by: David Guckian --- M src/soc/intel/common/block/systemagent/Kconfig M src/soc/intel/denverton_ns/Kconfig 2 files changed, 8 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved David Guckian: Looks good to me, but someone else must approve
diff --git a/src/soc/intel/common/block/systemagent/Kconfig b/src/soc/intel/common/block/systemagent/Kconfig index 1222573..6dd1f3b 100644 --- a/src/soc/intel/common/block/systemagent/Kconfig +++ b/src/soc/intel/common/block/systemagent/Kconfig @@ -3,6 +3,8 @@ help Intel Processor common System Agent support
+if SOC_INTEL_COMMON_BLOCK_SA + config MMCONF_BASE_ADDRESS hex default 0xe0000000 @@ -36,3 +38,5 @@ default n help This option allows you to add the DMA Protected Range (DPR). + +endif diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig index fa49eb0..aed2beb 100644 --- a/src/soc/intel/denverton_ns/Kconfig +++ b/src/soc/intel/denverton_ns/Kconfig @@ -54,6 +54,10 @@ select UDK_2015_BINDING select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
+config MMCONF_BASE_ADDRESS + hex + default 0xe0000000 + config FSP_T_ADDR hex "Intel FSP-T (temp ram init) binary location" depends on ADD_FSP_BINARIES && FSP_CAR