[coreboot-gerrit] Change in coreboot[master]: soc/intel/alderlake: Update chipset.cb for TSCC and USB

[Paul Menzel (Code Review)]

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48793 )

Change subject: soc/intel/alderlake: Update chipset.cb for TSCC and USB
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Patch Set 3:

(2 comments)

https://review.coreboot.org/c/coreboot/+/48793/3//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/48793/3//COMMIT_MSG@7 
PS3, Line 7: TSCC
Sorry, where is this in the diff?

https://review.coreboot.org/c/coreboot/+/48793/3//COMMIT_MSG@9 
PS3, Line 9: Refer TGL to add alias for TCSS and USB ports.
I do not understand this phrase.