HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44370 )
Change subject: {sb/intel/*/azalia.c,device/azalia_device.c}: Reduce the difference ......................................................................
{sb/intel/*/azalia.c,device/azalia_device.c}: Reduce the difference
Change-Id: Ia64e0ba10f145cf2eae0cb2ff4951b1455963d5d Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/device/azalia_device.c M src/southbridge/intel/bd82x6x/azalia.c M src/southbridge/intel/i82801gx/azalia.c M src/southbridge/intel/i82801ix/azalia.c M src/southbridge/intel/i82801jx/azalia.c M src/southbridge/intel/ibexpeak/azalia.c 6 files changed, 117 insertions(+), 121 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/44370/1
diff --git a/src/device/azalia_device.c b/src/device/azalia_device.c index bd35c8e..7b10d41 100644 --- a/src/device/azalia_device.c +++ b/src/device/azalia_device.c @@ -19,9 +19,7 @@ reg32 |= val; write32(port, reg32);
- /* Wait for readback of register to - * match what was just written to it - */ + /* Wait for readback of register to match what was just written to it */ count = 50; do { /* Wait 1ms based on BKDG wait time */ @@ -109,15 +107,13 @@ }
/** - * Wait 50usec for the codec to indicate it is ready - * no response would imply that the codec is non-operative + * Wait 50usec for the codec to indicate it is ready. + * No response would imply that the codec is non-operative. */
static int wait_for_ready(u8 *base) { - /* Use a 50 usec timeout - the Linux kernel uses the - * same duration */ - + /* Use a 50 usec timeout - the Linux kernel uses the same duration */ int timeout = 50;
while (timeout--) { @@ -131,28 +127,28 @@ }
/** - * Wait 50usec for the codec to indicate that it accepted - * the previous command. No response would imply that the code - * is non-operative + * Wait 50usec for the codec to indicate that it accepted the previous command. + * No response would imply that the code is non-operative. */
static int wait_for_valid(u8 *base) { - /* Use a 50 usec timeout - the Linux kernel uses the - * same duration */ - + u32 reg32; + /* Use a 50 usec timeout - the Linux kernel uses the same duration */ int timeout = 25;
- write32(base + HDA_ICII_REG, - HDA_ICII_VALID | HDA_ICII_BUSY); + /* Send the verb to the codec */ + reg32 = read32(base + HDA_ICII_REG); + reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID; + write32(base + HDA_ICII_REG, reg32); + while (timeout--) { udelay(1); } timeout = 50; while (timeout--) { - u32 reg32 = read32(base + HDA_ICII_REG); - if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == - HDA_ICII_VALID) + reg32 = read32(base + HDA_ICII_REG); + if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID) return 0; udelay(1); } @@ -170,14 +166,18 @@ printk(BIOS_DEBUG, "azalia_audio: Initializing codec #%d\n", addr);
/* 1 */ - if (wait_for_ready(base) == -1) + if (wait_for_ready(base) == -1) { + printk(BIOS_DEBUG, " codec not ready.\n"); return; + }
reg32 = (addr << 28) | 0x000f0000; write32(base + HDA_IC_REG, reg32);
- if (wait_for_valid(base) == -1) + if (wait_for_valid(base) == -1) { + printk(BIOS_DEBUG, " codec not valid.\n"); return; + }
reg32 = read32(base + HDA_IR_REG);
@@ -220,19 +220,18 @@ struct resource *res; u32 codec_mask;
- res = find_resource(dev, 0x10); + res = find_resource(dev, PCI_BASE_ADDRESS_0); if (!res) return;
- // NOTE this will break as soon as the azalia_audio get's a bar above - // 4G. Is there anything we can do about it? + // NOTE this will break as soon as the azalia_audio get's a bar above 4G. + // Is there anything we can do about it? base = res2mmio(res, 0, 0); printk(BIOS_DEBUG, "azalia_audio: base = %p\n", base); codec_mask = codec_detect(base);
if (codec_mask) { - printk(BIOS_DEBUG, "azalia_audio: codec_mask = %02x\n", - codec_mask); + printk(BIOS_DEBUG, "azalia_audio: codec_mask = %02x\n", codec_mask); codecs_init(dev, base, codec_mask); } } diff --git a/src/southbridge/intel/bd82x6x/azalia.c b/src/southbridge/intel/bd82x6x/azalia.c index 3d4f7ca..056cd77 100644 --- a/src/southbridge/intel/bd82x6x/azalia.c +++ b/src/southbridge/intel/bd82x6x/azalia.c @@ -26,9 +26,7 @@ reg32 |= val; write32(port, reg32);
- /* Wait for readback of register to - * match what was just written to it - */ + /* Wait for readback of register to match what was just written to it */ count = 50; do { /* Wait 1ms based on BKDG wait time */ @@ -52,10 +50,9 @@ goto no_codec;
/* Write back the value once reset bit is set. */ - write16(base + HDA_GCAP_REG, - read16(base + HDA_GCAP_REG)); + write16(base + HDA_GCAP_REG, read16(base + HDA_GCAP_REG));
- /* Read in Codec location (BAR + 0xe)[2..0]*/ + /* Read in Codec location (BAR + 0xe)[2..0] */ reg8 = read8(base + HDA_STATESTS_REG); reg8 &= 0x0f; if (!reg8) @@ -73,15 +70,15 @@
static u32 find_verb(struct device *dev, u32 viddid, const u32 **verb) { - int idx=0; + int idx = 0;
while (idx < (cim_verb_data_size / sizeof(u32))) { - u32 verb_size = 4 * cim_verb_data[idx+2]; // in u32 + u32 verb_size = 4 * cim_verb_data[idx + 2]; // in u32 if (cim_verb_data[idx] != viddid) { - idx += verb_size + 3; // skip verb + header + idx += verb_size + 3; // skip verb + header continue; } - *verb = &cim_verb_data[idx+3]; + *verb = &cim_verb_data[idx + 3]; return verb_size; }
@@ -90,14 +87,13 @@ }
/** - * Wait 50usec for the codec to indicate it is ready - * no response would imply that the codec is non-operative + * Wait 50usec for the codec to indicate it is ready. + * No response would imply that the codec is non-operative. */
static int wait_for_ready(u8 *base) { /* Use a 1msec timeout */ - int timeout = 1000;
while (timeout--) { @@ -111,27 +107,24 @@ }
/** - * Wait 50usec for the codec to indicate that it accepted - * the previous command. No response would imply that the code - * is non-operative + * Wait 50usec for the codec to indicate that it accepted the previous command. + * No response would imply that the code is non-operative. */
static int wait_for_valid(u8 *base) { u32 reg32; + /* Use a 50 usec timeout - the Linux kernel uses the same duration */ + int timeout = 1000;
/* Send the verb to the codec */ reg32 = read32(base + HDA_ICII_REG); reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID; write32(base + HDA_ICII_REG, reg32);
- /* Use a 1msec timeout */ - - int timeout = 1000; while (timeout--) { reg32 = read32(base + HDA_ICII_REG); - if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == - HDA_ICII_VALID) + if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID) return 0; udelay(1); } @@ -213,13 +206,12 @@ u32 codec_mask; u32 reg32;
- /* Find base address */ res = find_resource(dev, PCI_BASE_ADDRESS_0); if (!res) return;
- // NOTE this will break as soon as the Azalia get's a bar above - // 4G. Is there anything we can do about it? + // NOTE this will break as soon as the azalia_audio get's a bar above 4G. + // Is there anything we can do about it? base = res2mmio(res, 0, 0); printk(BIOS_DEBUG, "Azalia: base = %08x\n", (u32)base);
diff --git a/src/southbridge/intel/i82801gx/azalia.c b/src/southbridge/intel/i82801gx/azalia.c index add9069..32e58c8 100644 --- a/src/southbridge/intel/i82801gx/azalia.c +++ b/src/southbridge/intel/i82801gx/azalia.c @@ -50,7 +50,7 @@ if (set_bits(base + HDA_GCTL_REG, 1, 1) == -1) goto no_codec;
- /* Read in Codec location (BAR + 0xe)[2..0]*/ + /* Read in Codec location (BAR + 0xe)[2..0] */ reg32 = read32(base + HDA_STATESTS_REG); reg32 &= 0x0f; if (!reg32) @@ -71,12 +71,12 @@ int idx = 0;
while (idx < (cim_verb_data_size / sizeof(u32))) { - u32 verb_size = 4 * cim_verb_data[idx+2]; // in u32 + u32 verb_size = 4 * cim_verb_data[idx + 2]; // in u32 if (cim_verb_data[idx] != viddid) { - idx += verb_size + 3; // skip verb + header + idx += verb_size + 3; // skip verb + header continue; } - *verb = &cim_verb_data[idx+3]; + *verb = &cim_verb_data[idx + 3]; return verb_size; }
@@ -85,8 +85,8 @@ }
/** - * Wait 50usec for the codec to indicate it is ready - * no response would imply that the codec is non-operative + * Wait 50usec for the codec to indicate it is ready. + * No response would imply that the codec is non-operative. */
static int wait_for_ready(u8 *base) @@ -105,22 +105,21 @@ }
/** - * Wait 50usec for the codec to indicate that it accepted the previous command. - * No response would imply that the code is non-operative. + * Wait 50usec for the codec to indicate that it accepted the previous command. + * No response would imply that the code is non-operative. */
static int wait_for_valid(u8 *base) { u32 reg32; + /* Use a 50 usec timeout - the Linux kernel uses the same duration */ + int timeout = 50;
/* Send the verb to the codec */ reg32 = read32(base + HDA_ICII_REG); reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID; write32(base + HDA_ICII_REG, reg32);
- /* Use a 50 usec timeout - the Linux kernel uses the same duration */ - - int timeout = 50; while (timeout--) { reg32 = read32(base + HDA_ICII_REG); if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID) @@ -141,14 +140,18 @@ printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr);
/* 1 */ - if (wait_for_ready(base) == -1) + if (wait_for_ready(base) == -1) { + printk(BIOS_DEBUG, " codec not ready.\n"); return; + }
reg32 = (addr << 28) | 0x000f0000; write32(base + HDA_IC_REG, reg32);
- if (wait_for_valid(base) == -1) + if (wait_for_valid(base) == -1) { + printk(BIOS_DEBUG, " codec not valid.\n"); return; + }
reg32 = read32(base + HDA_IR_REG);
@@ -178,6 +181,7 @@ static void codecs_init(struct device *dev, u8 *base, u32 codec_mask) { int i; + for (i = 2; i >= 0; i--) { if (codec_mask & (1 << i)) codec_init(dev, base, i); @@ -230,12 +234,12 @@ // Docking not supported pci_and_config8(dev, 0x4d, (u8)~(1 << 7)); // Docking Status
- res = find_resource(dev, 0x10); + res = find_resource(dev, PCI_BASE_ADDRESS_0); if (!res) return;
- // NOTE this will break as soon as the Azalia get's a bar above - // 4G. Is there anything we can do about it? + // NOTE this will break as soon as the azalia_audio get's a bar above 4G. + // Is there anything we can do about it? base = res2mmio(res, 0, 0); printk(BIOS_DEBUG, "Azalia: base = %08x\n", (u32)base); codec_mask = codec_detect(base); diff --git a/src/southbridge/intel/i82801ix/azalia.c b/src/southbridge/intel/i82801ix/azalia.c index f0c00b6..71ee01d 100644 --- a/src/southbridge/intel/i82801ix/azalia.c +++ b/src/southbridge/intel/i82801ix/azalia.c @@ -50,7 +50,7 @@ if (set_bits(base + HDA_GCTL_REG, 1, 1) == -1) goto no_codec;
- /* Read in Codec location (BAR + 0xe)[2..0]*/ + /* Read in Codec location (BAR + 0xe)[2..0] */ reg32 = read32(base + HDA_STATESTS_REG); reg32 &= 0x0f; if (!reg32) @@ -71,12 +71,12 @@ int idx = 0;
while (idx < (cim_verb_data_size / sizeof(u32))) { - u32 verb_size = 4 * cim_verb_data[idx+2]; // in u32 + u32 verb_size = 4 * cim_verb_data[idx + 2]; // in u32 if (cim_verb_data[idx] != viddid) { - idx += verb_size + 3; // skip verb + header + idx += verb_size + 3; // skip verb + header continue; } - *verb = &cim_verb_data[idx+3]; + *verb = &cim_verb_data[idx + 3]; return verb_size; }
@@ -85,8 +85,8 @@ }
/** - * Wait 50usec for the codec to indicate it is ready - * no response would imply that the codec is non-operative + * Wait 50usec for the codec to indicate it is ready. + * No response would imply that the codec is non-operative. */
static int wait_for_ready(u8 *base) @@ -105,22 +105,21 @@ }
/** - * Wait 50usec for the codec to indicate that it accepted the previous command. - * No response would imply that the code is non-operative. + * Wait 50usec for the codec to indicate that it accepted the previous command. + * No response would imply that the code is non-operative. */
static int wait_for_valid(u8 *base) { u32 reg32; + /* Use a 50 usec timeout - the Linux kernel uses the same duration */ + int timeout = 50;
/* Send the verb to the codec */ reg32 = read32(base + HDA_ICII_REG); reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID; write32(base + HDA_ICII_REG, reg32);
- /* Use a 50 usec timeout - the Linux kernel uses the same duration */ - - int timeout = 50; while (timeout--) { reg32 = read32(base + HDA_ICII_REG); if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID) @@ -141,14 +140,18 @@ printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr);
/* 1 */ - if (wait_for_ready(base) == -1) + if (wait_for_ready(base) == -1) { + printk(BIOS_DEBUG, " codec not ready.\n"); return; + }
reg32 = (addr << 28) | 0x000f0000; write32(base + HDA_IC_REG, reg32);
- if (wait_for_valid(base) == -1) + if (wait_for_valid(base) == -1) { + printk(BIOS_DEBUG, " codec not valid.\n"); return; + }
reg32 = read32(base + HDA_IR_REG);
@@ -178,6 +181,7 @@ static void codecs_init(struct device *dev, u8 *base, u32 codec_mask) { int i; + for (i = 2; i >= 0; i--) { if (codec_mask & (1 << i)) codec_init(dev, base, i); @@ -224,12 +228,12 @@ /* Lock some R/WO bits by writing their current value. */ pci_update_config32(dev, 0x74, ~0, 0);
- res = find_resource(dev, 0x10); + res = find_resource(dev, PCI_BASE_ADDRESS_0); if (!res) return;
- // NOTE this will break as soon as the Azalia get's a bar above - // 4G. Is there anything we can do about it? + // NOTE this will break as soon as the azalia_audio get's a bar above 4G. + // Is there anything we can do about it? base = res2mmio(res, 0, 0); printk(BIOS_DEBUG, "Azalia: base = %p\n", base); codec_mask = codec_detect(base); diff --git a/src/southbridge/intel/i82801jx/azalia.c b/src/southbridge/intel/i82801jx/azalia.c index b53d641..aedd748 100644 --- a/src/southbridge/intel/i82801jx/azalia.c +++ b/src/southbridge/intel/i82801jx/azalia.c @@ -50,7 +50,7 @@ if (set_bits(base + HDA_GCTL_REG, 1, 1) == -1) goto no_codec;
- /* Read in Codec location (BAR + 0xe)[2..0]*/ + /* Read in Codec location (BAR + 0xe)[2..0] */ reg32 = read32(base + HDA_STATESTS_REG); reg32 &= 0x0f; if (!reg32) @@ -71,12 +71,12 @@ int idx = 0;
while (idx < (cim_verb_data_size / sizeof(u32))) { - u32 verb_size = 4 * cim_verb_data[idx+2]; // in u32 + u32 verb_size = 4 * cim_verb_data[idx + 2]; // in u32 if (cim_verb_data[idx] != viddid) { - idx += verb_size + 3; // skip verb + header + idx += verb_size + 3; // skip verb + header continue; } - *verb = &cim_verb_data[idx+3]; + *verb = &cim_verb_data[idx + 3]; return verb_size; }
@@ -85,8 +85,8 @@ }
/** - * Wait 50usec for the codec to indicate it is ready - * no response would imply that the codec is non-operative + * Wait 50usec for the codec to indicate it is ready. + * No response would imply that the codec is non-operative. */
static int wait_for_ready(u8 *base) @@ -105,22 +105,21 @@ }
/** - * Wait 50usec for the codec to indicate that it accepted the previous command. - * No response would imply that the code is non-operative. + * Wait 50usec for the codec to indicate that it accepted the previous command. + * No response would imply that the code is non-operative. */
static int wait_for_valid(u8 *base) { u32 reg32; + /* Use a 50 usec timeout - the Linux kernel uses the same duration */ + int timeout = 50;
/* Send the verb to the codec */ reg32 = read32(base + HDA_ICII_REG); reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID; write32(base + HDA_ICII_REG, reg32);
- /* Use a 50 usec timeout - the Linux kernel uses the same duration */ - - int timeout = 50; while (timeout--) { reg32 = read32(base + HDA_ICII_REG); if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID) @@ -141,14 +140,18 @@ printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr);
/* 1 */ - if (wait_for_ready(base) == -1) + if (wait_for_ready(base) == -1) { + printk(BIOS_DEBUG, " codec not ready.\n"); return; + }
reg32 = (addr << 28) | 0x000f0000; write32(base + HDA_IC_REG, reg32);
- if (wait_for_valid(base) == -1) + if (wait_for_valid(base) == -1) { + printk(BIOS_DEBUG, " codec not valid.\n"); return; + }
reg32 = read32(base + HDA_IR_REG);
@@ -178,6 +181,7 @@ static void codecs_init(struct device *dev, u8 *base, u32 codec_mask) { int i; + for (i = 2; i >= 0; i--) { if (codec_mask & (1 << i)) codec_init(dev, base, i); @@ -224,12 +228,12 @@ /* Lock some R/WO bits by writing their current value. */ pci_update_config32(dev, 0x74, ~0, 0);
- res = find_resource(dev, 0x10); + res = find_resource(dev, PCI_BASE_ADDRESS_0); if (!res) return;
- // NOTE this will break as soon as the Azalia get's a bar above - // 4G. Is there anything we can do about it? + // NOTE this will break as soon as the azalia_audio get's a bar above 4G. + // Is there anything we can do about it? base = res2mmio(res, 0, 0); printk(BIOS_DEBUG, "Azalia: base = %p\n", base); codec_mask = codec_detect(base); diff --git a/src/southbridge/intel/ibexpeak/azalia.c b/src/southbridge/intel/ibexpeak/azalia.c index 47d595c..acac6a9 100644 --- a/src/southbridge/intel/ibexpeak/azalia.c +++ b/src/southbridge/intel/ibexpeak/azalia.c @@ -22,9 +22,7 @@ reg32 |= val; write32(port, reg32);
- /* Wait for readback of register to - * match what was just written to it - */ + /* Wait for readback of register to match what was just written to it */ count = 50; do { /* Wait 1ms based on BKDG wait time */ @@ -48,10 +46,9 @@ goto no_codec;
/* Write back the value once reset bit is set. */ - write16(base + HDA_GCAP_REG, - read16(base + HDA_GCAP_REG)); + write16(base + HDA_GCAP_REG, read16(base + HDA_GCAP_REG));
- /* Read in Codec location (BAR + 0xe)[2..0]*/ + /* Read in Codec location (BAR + 0xe)[2..0] */ reg8 = read8(base + HDA_STATESTS_REG); reg8 &= 0x0f; if (!reg8) @@ -69,15 +66,15 @@
static u32 find_verb(struct device *dev, u32 viddid, const u32 **verb) { - int idx=0; + int idx = 0;
while (idx < (cim_verb_data_size / sizeof(u32))) { - u32 verb_size = 4 * cim_verb_data[idx+2]; // in u32 + u32 verb_size = 4 * cim_verb_data[idx + 2]; // in u32 if (cim_verb_data[idx] != viddid) { - idx += verb_size + 3; // skip verb + header + idx += verb_size + 3; // skip verb + header continue; } - *verb = &cim_verb_data[idx+3]; + *verb = &cim_verb_data[idx + 3]; return verb_size; }
@@ -86,14 +83,13 @@ }
/** - * Wait 50usec for the codec to indicate it is ready - * no response would imply that the codec is non-operative + * Wait 50usec for the codec to indicate it is ready. + * No response would imply that the codec is non-operative. */
static int wait_for_ready(u8 *base) { /* Use a 1msec timeout */ - int timeout = 1000;
while (timeout--) { @@ -107,27 +103,24 @@ }
/** - * Wait 50usec for the codec to indicate that it accepted - * the previous command. No response would imply that the code - * is non-operative + * Wait 50usec for the codec to indicate that it accepted the previous command. + * No response would imply that the code is non-operative. */
static int wait_for_valid(u8 *base) { u32 reg32; + /* Use a 1msec timeout */ + int timeout = 1000;
/* Send the verb to the codec */ reg32 = read32(base + HDA_ICII_REG); reg32 |= HDA_ICII_BUSY | HDA_ICII_VALID; write32(base + HDA_ICII_REG, reg32);
- /* Use a 1msec timeout */ - - int timeout = 1000; while (timeout--) { reg32 = read32(base + HDA_ICII_REG); - if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == - HDA_ICII_VALID) + if ((reg32 & (HDA_ICII_VALID | HDA_ICII_BUSY)) == HDA_ICII_VALID) return 0; udelay(1); } @@ -216,8 +209,8 @@ if (!res) return;
- // NOTE this will break as soon as the Azalia get's a bar above - // 4G. Is there anything we can do about it? + // NOTE this will break as soon as the azalia_audio get's a bar above 4G. + // Is there anything we can do about it? base = res2mmio(res, 0, 0); printk(BIOS_DEBUG, "Azalia: base = %08x\n", (u32)base);