Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42064 )
Change subject: soc/amd/picasso: Allow modification of i2c base addresses in PSP ......................................................................
soc/amd/picasso: Allow modification of i2c base addresses in PSP
BUG=b:158124527 TEST=Build & boot psp_verstage on trembyle
Signed-off-by: Martin Roth martin@coreboot.org Change-Id: I45380e0c61e1bb7a94a96630e5867b7ffca0909c Reviewed-on: https://review.coreboot.org/c/coreboot/+/42064 Reviewed-by: Raul Rangel rrangel@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/amd/picasso/i2c.c M src/soc/amd/picasso/include/soc/i2c.h 2 files changed, 26 insertions(+), 15 deletions(-)
Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved
diff --git a/src/soc/amd/picasso/i2c.c b/src/soc/amd/picasso/i2c.c index 881278f..1eb0720 100644 --- a/src/soc/amd/picasso/i2c.c +++ b/src/soc/amd/picasso/i2c.c @@ -13,9 +13,7 @@ #include <soc/southbridge.h> #include "chip.h"
-/* - * We don't have addresses for I2C0-1. - */ +#if ENV_X86 static const uintptr_t i2c_bus_address[I2C_MASTER_DEV_COUNT + I2C_SLAVE_DEV_COUNT] = { 0, 0, @@ -23,6 +21,9 @@ APU_I2C3_BASE, APU_I2C4_BASE, /* Can only be used in slave mode */ }; +#else +static uintptr_t i2c_bus_address[I2C_MASTER_DEV_COUNT + I2C_SLAVE_DEV_COUNT]; +#endif
uintptr_t dw_i2c_base_address(unsigned int bus) { @@ -32,6 +33,18 @@ return i2c_bus_address[bus]; }
+#if !ENV_X86 +void i2c_set_bar(unsigned int bus, uintptr_t bar) +{ + if (bus >= ARRAY_SIZE(i2c_bus_address)) { + printk(BIOS_ERR, "Error: i2c index out of bounds: %u.", bus); + return; + } + + i2c_bus_address[bus] = bar; +} +#endif + const struct dw_i2c_bus_config *dw_i2c_get_soc_cfg(unsigned int bus) { const struct soc_amd_picasso_config *config; @@ -47,28 +60,23 @@
static const char *i2c_acpi_name(const struct device *dev) { - switch (dev->path.mmio.addr) { - case APU_I2C2_BASE: + if ((uintptr_t)dev->path.mmio.addr == i2c_bus_address[2]) return "I2C2"; - case APU_I2C3_BASE: + else if ((uintptr_t)dev->path.mmio.addr == i2c_bus_address[3]) return "I2C3"; - case APU_I2C4_BASE: + else if ((uintptr_t)dev->path.mmio.addr == i2c_bus_address[4]) return "I2C4"; - default: - return NULL; - } + return NULL; }
int dw_i2c_soc_dev_to_bus(const struct device *dev) { - switch (dev->path.mmio.addr) { - case APU_I2C2_BASE: + if ((uintptr_t)dev->path.mmio.addr == i2c_bus_address[2]) return 2; - case APU_I2C3_BASE: + else if ((uintptr_t)dev->path.mmio.addr == i2c_bus_address[3]) return 3; - case APU_I2C4_BASE: + else if ((uintptr_t)dev->path.mmio.addr == i2c_bus_address[4]) return 4; - } return -1; }
diff --git a/src/soc/amd/picasso/include/soc/i2c.h b/src/soc/amd/picasso/include/soc/i2c.h index 34c19aa..20084f0 100644 --- a/src/soc/amd/picasso/include/soc/i2c.h +++ b/src/soc/amd/picasso/include/soc/i2c.h @@ -22,4 +22,7 @@
void sb_reset_i2c_slaves(void);
+/* Sets the base address for the specific I2C bus. */ +void i2c_set_bar(unsigned int bus, uintptr_t bar); + #endif /* __PICASSO_I2C_H__ */