Attention is currently required from: Lean Sheng Tan, Michał Żygowski, Nicholas Sudsgaard, Piotr Król, Werner Zeh.
Hello Lean Sheng Tan, Nicholas Sudsgaard, Werner Zeh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/79921?usp=email
to look at the new patch set (#2).
Change subject: soc/intel/elkhartlake: Drop redundant PcieRpEnable ......................................................................
soc/intel/elkhartlake: Drop redundant PcieRpEnable
The PcieRpEnable option is redundant to our on/off setting in the devicetrees. Let's use the common coreboot infracture instead.
Thanks to Nicholas for doing all the mainboard legwork!
Change-Id: I11c3c45eae0e1451d5c54c17b7e60300dedda8fa Signed-off-by: Nico Huber nico.h@gmx.de Signed-off-by: Nicholas Sudsgaard devel+coreboot@nsudsgaard.com --- M src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb M src/mainboard/protectli/vault_ehl/devicetree.cb M src/mainboard/siemens/fa_ehl/variants/fa_ehl/devicetree.cb M src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb M src/mainboard/siemens/mc_ehl/variants/mc_ehl3/devicetree.cb M src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb M src/mainboard/siemens/mc_ehl/variants/mc_ehl5/devicetree.cb M src/soc/intel/elkhartlake/Makefile.inc M src/soc/intel/elkhartlake/chip.c M src/soc/intel/elkhartlake/chip.h A src/soc/intel/elkhartlake/include/soc/pcie.h A src/soc/intel/elkhartlake/pcie_rp.c M src/soc/intel/elkhartlake/romstage/fsp_params.c 14 files changed, 26 insertions(+), 55 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/79921/2