Paul Menzel (paulepanter@users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3316
-gerrit
commit 2db71c690c5b0aaa98dcf0980f4d8071a381da53 Author: Rudolf Marek r.marek@assembler.cz Date: Mon May 27 16:00:25 2013 +0200
AMD Fam15tn: Fix IOMMU scratch support in AGESA
The IOMMU support is broken and does not even compile.
Adding the header file `GnbIommuScratch.h` for the function `GnbIommuScratchMemoryRangeInterface()` and fixing the 64-bit versus 32-bit address issue, the file compiles now and is therefore hooked up into the build system.
Change-Id: I1924a113af12b186edcdf1956cb5ec5453aee34c Signed-off-by: Rudolf Marek r.marek@assembler.cz Signed-off-by: Paul Menzel paulepanter@users.sourceforge.net --- src/vendorcode/amd/agesa/f15tn/Makefile.inc | 2 + .../GNB/Modules/GnbIommuScratch/GnbIommuScratch.c | 8 +++- .../GNB/Modules/GnbIommuScratch/GnbIommuScratch.h | 55 ++++++++++++++++++++++ 3 files changed, 64 insertions(+), 1 deletion(-)
diff --git a/src/vendorcode/amd/agesa/f15tn/Makefile.inc b/src/vendorcode/amd/agesa/f15tn/Makefile.inc index 00ace78..70b3880 100644 --- a/src/vendorcode/amd/agesa/f15tn/Makefile.inc +++ b/src/vendorcode/amd/agesa/f15tn/Makefile.inc @@ -78,6 +78,7 @@ AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Modules/GnbIvrsLib AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Modules/GnbSbIommuLib AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Modules/GnbTable AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Modules/GnbPcieInitLibV4 +AGESA_INC += -I$(AGESA_ROOT)/Proc/GNB/Modules/GnbIommuScratch AGESA_INC += -I$(AGESA_ROOT)/Proc/Fch AGESA_INC += -I$(AGESA_ROOT)/Proc/Fch/Common AGESA_INC += -I$(AGESA_ROOT)/Proc/IDS/Debug @@ -241,6 +242,7 @@ libagesa-y += Proc/GNB/Modules/GnbInitTN/PciePostInitTN.c libagesa-y += Proc/GNB/Modules/GnbInitTN/PciePowerGateTN.c libagesa-y += Proc/GNB/Modules/GnbInitTN/PcieTablesTN.c libagesa-y += Proc/GNB/Modules/GnbIommuIvrs/GnbIommuIvrs.c +libagesa-y += Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.c libagesa-y += Proc/GNB/Modules/GnbIvrsLib/GnbIvrsLib.c libagesa-y += Proc/GNB/Modules/GnbMSocketLib/GnbMSocketLib.c libagesa-y += Proc/GNB/Modules/GnbNbInitLibV1/GnbNbInitLibV1.c diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.c b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.c index 45d0cd7..9bdc854 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.c @@ -57,6 +57,7 @@ #include "GnbRegistersTN.h" #include "heapManager.h" #include "Filecode.h" +#include "GnbIommuScratch.h" #define FILECODE PROC_GNB_MODULES_GNBIOMMUSCRATCH_GNBIOMMUSCRATCH_FILECODE /*---------------------------------------------------------------------------------------- * D E F I N I T I O N S A N D M A C R O S @@ -111,9 +112,14 @@ GnbIommuScratchMemoryRangeInterface ( return AGESA_FATAL; }
+ /* align the address to 64 bytes boundary */ +#ifdef __x86_64__ AddressLow = (((UINT32) ((UINT64) AllocHeapParams.BufferPtr)) + 0x3F) & D0F0x98_x27_IOMMUUrAddr_31_6__MASK; AddressHigh = ((UINT32) (((UINT64) AllocHeapParams.BufferPtr) >> 32)) & D0F0x98_x26_IOMMUUrAddr_39_32__MASK; - +#else + AddressLow = ((((UINT32) AllocHeapParams.BufferPtr)) + 0x3F) & D0F0x98_x27_IOMMUUrAddr_31_6__MASK; + AddressHigh = 0; +#endif GnbHandle = GnbGetHandle (StdHeader); while (GnbHandle != NULL) { if (GnbFmCheckIommuPresent (GnbHandle, StdHeader)) { diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.h b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.h new file mode 100644 index 0000000..4edcb37 --- /dev/null +++ b/src/vendorcode/amd/agesa/f15tn/Proc/GNB/Modules/GnbIommuScratch/GnbIommuScratch.h @@ -0,0 +1,55 @@ +/* $NoKeywords:$ */ +/** + * @file + * + * NB services + * IOMMU scratch page + * + * + * + * @xrefitem bom "File Content Label" "Release Content" + * @e project: AGESA + * @e sub-project: GNB + * @e $Revision: $ @e $Date: $ + * + */ +/* +***************************************************************************** +* + * Copyright (c) 2008 - 2012, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* *************************************************************************** +* +*/ + +#ifndef _GNBIOMMUSCRATCH_H_ +#define _GNBIOMMUSCRATCH_H_ + +AGESA_STATUS +GnbIommuScratchMemoryRangeInterface ( + IN AMD_CONFIG_PARAMS *StdHeader + ); + +#endif