build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74796 )
Change subject: soc/intel/cmn/cse: Remove dependency on ME_RW compression for CSE FW sync ......................................................................
Patch Set 1:
(5 comments)
Commit Message:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-175054): https://review.coreboot.org/c/coreboot/+/74796/comment/3e478ca5_bee5a617 PS1, Line 9: The change 'commit:Iac37aaa5ede5e1cd: ("Add Kconfigs to indicate when CSE Possible unwrapped commit description (prefer a maximum 72 chars per line)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-175054): https://review.coreboot.org/c/coreboot/+/74796/comment/8b662bf2_c98c9765 PS1, Line 10: FW sync is performed")' adds support to choose CSE FW update to be performed Possible unwrapped commit description (prefer a maximum 72 chars per line)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-175054): https://review.coreboot.org/c/coreboot/+/74796/comment/0692a791_f1a3d2f4 PS1, Line 14: This patch removed the dependency between CSE FW sync in RAMSTAGE and ME_RW Possible unwrapped commit description (prefer a maximum 72 chars per line)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-175054): https://review.coreboot.org/c/coreboot/+/74796/comment/ef50f783_b9ea7344 PS1, Line 15: firmware compression as these two are not related and should be decoupled Possible unwrapped commit description (prefer a maximum 72 chars per line)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-175054): https://review.coreboot.org/c/coreboot/+/74796/comment/7478b557_cb07421e PS1, Line 16: to support CSE FW sync in RAMSTAGE without the requirement to compress ME_FW. Possible unwrapped commit description (prefer a maximum 72 chars per line)