Attention is currently required from: Angel Pons. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37200 )
Change subject: nb/intel/sandybridge: Cache cbmem and stage cache in romstage ......................................................................
Patch Set 15:
(1 comment)
File src/northbridge/intel/sandybridge/raminit.c:
https://review.coreboot.org/c/coreboot/+/37200/comment/5553599b_95b67a69 PS15, Line 466: setup_romstage_wb_cbmem_cache(8 * MiB);
Is this related to memmap.c function `fill_postcar_frame`?
Yes. The function is less smart and only uses one MTRR however.
Also, this call is only effective on the native raminit codepath.
The idea is to set it up before cbmem is up (to speed things up). It's probably a good idea to move that cbmem init + extras to a common place or provide a post cbmem_init callback for things happening after cbmem init here.