[coreboot-gerrit] Change in coreboot[master]: drivers/intel/fsp2_0: Add callback after non-XIP FSP-M load

[Felix Held (Code Review)]

Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38700 )

Change subject: drivers/intel/fsp2_0: Add callback after non-XIP FSP-M load
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Patch Set 6:

After talking to Nico on IRC it finally became clear what his point is here: The memory reservation should be done in the FSP driver and not the Picasso SoC code, since it's not specific to Picasso, but to the (non-XIP & non-CAR) FSP-M case. Not sure if it would be better to rework this now or fix it later, but before the next platform will land