[coreboot-gerrit] Change in coreboot[master]: soc/sifive/fu540: Remove PLL parameters from sdram.c

[Jonathan Neuschäfer (Code Review)]

Jonathan Neuschäfer has uploaded this change for review. ( https://review.coreboot.org/28710

Change subject: soc/sifive/fu540: Remove PLL parameters from sdram.c
......................................................................

soc/sifive/fu540: Remove PLL parameters from sdram.c

These parameters are not used and not necessary in sdram.c, because the
DDR PLL is configured in clock.c.

Change-Id: I8060bd21e05765cedf7bdabc28052c32774f9ca1
Signed-off-by: Jonathan Neuschäfer 
---
M src/soc/sifive/fu540/sdram.c
1 file changed, 0 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/28710/1

diff --git a/src/soc/sifive/fu540/sdram.c b/src/soc/sifive/fu540/sdram.c
index 6418b0d..bf549bf 100644
--- a/src/soc/sifive/fu540/sdram.c
+++ b/src/soc/sifive/fu540/sdram.c
@@ -25,8 +25,6 @@
 #include "ddrregs.h"

#define DDR_SIZE  (8UL * 1024UL * 1024UL * 1024UL)
-#define DDRCTLPLL_F 55
-#define DDRCTLPLL_Q 2

void sdram_init(void)
 {