Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35681 )
Change subject: cpu/x86/smm: Add support for long mode
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Patch Set 5:
(3 comments)
Do you want SMM to rely on a RO component (pagetable)? Wouldn't copying it in ASEG/TSEG be a better idea?
https://review.coreboot.org/c/coreboot/+/35681/5/src/cpu/x86/smm/smmhandler....
File src/cpu/x86/smm/smmhandler.S:
https://review.coreboot.org/c/coreboot/+/35681/5/src/cpu/x86/smm/smmhandler....
PS5, Line 198: MSR registers
Why can't that MSR be accessed in 64bit mode?
https://review.coreboot.org/c/coreboot/+/35681/5/src/cpu/x86/smm/smmhandler....
PS5, Line 219: /* Disable paging */
: movl %cr0, %eax
: andl $0x7FFFFFFF, %eax
: movl %eax, %cr0
Isn't this covered by the savestate?
https://review.coreboot.org/c/coreboot/+/35681/5/src/cpu/x86/smm/smmhandler....
PS5, Line 229:
: /* Disable PAE */
: movl %cr4, %eax
: andl $(~0x20), %eax
: movl %eax, %cr4
Isn't this covered by the savestate?
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