Arthur Heymans has uploaded a new change for review. ( https://review.coreboot.org/19760 )
Change subject: mb/gigabyte/ga-g41m-es2l: Enable IO decode range for LPT and FDD ......................................................................
mb/gigabyte/ga-g41m-es2l: Enable IO decode range for LPT and FDD
Change-Id: I77aabf98ea48c6e8bdbe322f89666935f59a289a Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/mainboard/gigabyte/ga-g41m-es2l/romstage.c 1 file changed, 2 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/19760/1
diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c index 229f028..e8eef7c 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c +++ b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c @@ -122,7 +122,8 @@ /* Decode range */ pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0010); pci_write_config16(PCI_DEV(0, 0x1f, 0), LPC_EN, - CNF1_LPC_EN | CNF2_LPC_EN | KBC_LPC_EN | COMA_LPC_EN | COMB_LPC_EN); + CNF1_LPC_EN | CNF2_LPC_EN | KBC_LPC_EN | FDD_LPC_EN + | LPT_LPC_EN | COMA_LPC_EN | COMB_LPC_EN);
pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x88, 0x0291); pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x8a, 0x007c);