Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45267 )
Change subject: mb/google/dedede/variants/drawcia: Reduce TCC offset from 20 to 5 ......................................................................
mb/google/dedede/variants/drawcia: Reduce TCC offset from 20 to 5
Reduce TCC offset value from 20 to 5 for Thermal Control Circuit(TCC) activation.
Change-Id: I9222a922a55d27bc175f219c5bbb59b246abec9f Signed-off-by: Sumeet R Pawnikar sumeet.r.pawnikar@intel.com --- M src/mainboard/google/dedede/variants/drawcia/overridetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/45267/1
diff --git a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb index 395dee3..adde5bc 100644 --- a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb +++ b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb @@ -62,7 +62,7 @@ .tdp_pl2_override = 15, }"
- register "tcc_offset" = "20" # TCC of 85C + register "tcc_offset" = "5" # TCC of 100C
device domain 0 on device pci 04.0 on