Attention is currently required from: Felix Singer, Tim Wawrzynczak, Angel Pons, Patrick Rudolph, EricR Lai. Hello Felix Singer, build bot (Jenkins), Tim Wawrzynczak, Angel Pons, Nick Vaccaro, Lean Sheng Tan, Patrick Rudolph, EricR Lai,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/60406
to look at the new patch set (#18).
Change subject: soc/intel/alderlake: Skip FSP Notify APIs ......................................................................
soc/intel/alderlake: Skip FSP Notify APIs
SoC selects relevant Kconfigs as below: - SKIP_FSP_NOTIFY_PHASE_READY_TO_BOOT - SKIP_FSP_NOTIFY_PHASE_END_OF_FIRMWARE to skip FSP notify APIs (Ready to boot and End of Firmware) and make use of native coreboot driver to perform SoC recommended operations prior booting to payload/OS.
Additionally, created a helper function `heci_finalize()` to keep HECI related operations separated for easy guarding again config.
BUG=b:211954778 TEST=Able to build brya with these changes and coreboot log with this code change as below when ADL SoC selects required configs.
BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 62 ms coreboot skipped calling FSP notify phase: 00000040. coreboot skipped calling FSP notify phase: 000000f0. BS: BS_PAYLOAD_LOAD exit times (exec / console): 0 / 11 ms Finalizing chipset. apm_control: Finalizing SMM. APMC done. HECI: Sending End-of-Post CSE: EOP requested action: continue boot CSE EOP successful, continuing boot HECI: CSE device 16.1 is disabled HECI: CSE device 16.4 is disabled HECI: CSE device 16.5 is disabled BS: BS_PAYLOAD_BOOT entry times (exec / console): 9 / 27 ms
Signed-off-by: Subrata Banik subratabanik@google.com Change-Id: I0198c9568de0e74053775682a44324405746389a --- M src/soc/intel/alderlake/Kconfig M src/soc/intel/alderlake/finalize.c 2 files changed, 18 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/60406/18