[coreboot-gerrit] Change in coreboot[master]: soc/intel/alderlake/fsp_params.c: Fill PCI SSID parameters

[build bot (Jenkins) (Code Review)]

Attention is currently required from: Michał Kopeć, Tim Wawrzynczak.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63836 )

Change subject: soc/intel/alderlake/fsp_params.c: Fill PCI SSID parameters
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Patch Set 8: Verified-1

(2 comments)

File src/soc/intel/alderlake/fsp_params.c:

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150377):
https://review.coreboot.org/c/coreboot/+/63836/comment/6839800d_3f9b0a2a 
PS8, Line 889: 				uint64_t :4;
space prohibited before that ':' (ctx:WxV)

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-150377):
https://review.coreboot.org/c/coreboot/+/63836/comment/a68585b7_3792baef 
PS8, Line 891: 				uint64_t :16;
space prohibited before that ':' (ctx:WxV)