Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42073 )
Change subject: [WIP] sb,soc/amd: Allow dynamic ACPIMMIO base address ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/c/coreboot/+/42073/2/src/soc/amd/common/block/in... File src/soc/amd/common/block/include/amdblocks/acpimmio_map.h:
https://review.coreboot.org/c/coreboot/+/42073/2/src/soc/amd/common/block/in... PS2, Line 47: #else
I have no docs and did not search for the code in psp-verstage application how it is done there. […]
Basically, the interface is that one has to request each bank individually: https://review.coreboot.org/c/coreboot/+/42060/4/src/vendorcode/amd/fsp/pica...
The ids for that svc call are in that same header: typedef enum FCH_IO_DEVICE { FCH_IO_DEVICE_SPI, FCH_IO_DEVICE_I2C, FCH_IO_DEVICE_GPIO, FCH_IO_DEVICE_ESPI, FCH_IO_DEVICE_IOMUX, FCH_IO_DEVICE_MISC, FCH_IO_DEVICE_AOAC, FCH_IO_DEVICE_IOPORT,
FCH_IO_DEVICE_END, } FCH_IO_DEVICE;
I was hoping the mapping would be consistent as well, but it truly is putting each mapping into its own page, and it's not consistent. It's based on the ordering of the mapping at runtime. Once a mapping is performed it doesn't change.
atomicity of rmw with a single instruction is typically not supported anywhere on MMIO. It's not something we can generally count on, but that's true for all archs I know (not saying it's impossible, but its' not something to expect).
https://review.coreboot.org/c/coreboot/+/42073/2/src/soc/amd/common/block/in... PS2, Line 83: #define ACPIMMIO_BASE(base, x) (void *)(base + ACPIMMIO_ ## x ## _BANK)
I had assumed the entire ACPIMMIO block of 8 KB would be accessible for psp-verstage application as […]
Which ones were you referring to? The supported mappings for service call are not all the mmio bases as far as I know:
typedef enum FCH_IO_DEVICE { FCH_IO_DEVICE_SPI, FCH_IO_DEVICE_I2C, FCH_IO_DEVICE_GPIO, FCH_IO_DEVICE_ESPI, FCH_IO_DEVICE_IOMUX, FCH_IO_DEVICE_MISC, FCH_IO_DEVICE_AOAC, FCH_IO_DEVICE_IOPORT,
FCH_IO_DEVICE_END, } FCH_IO_DEVICE;