[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Update chip files

[Wonkyu Kim (Code Review)]

Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37783 )

Change subject: soc/intel/tigerlake: Update chip files
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Patch Set 31:

(3 comments)

https://review.coreboot.org/c/coreboot/+/37783/22/src/soc/intel/tigerlake/ch... 
File src/soc/intel/tigerlake/chip.h:

https://review.coreboot.org/c/coreboot/+/37783/22/src/soc/intel/tigerlake/ch... 
PS22, Line 135: /* Need to update DLL setting to get Emmc running at HS400 speed */
              : 	uint8_t EmmcUseCustomDlls;
              : 	uint32_t EmmcTxCmdDelayRegValue;
              : 	uint32_t EmmcTxDataDelay1RegValue;
              : 	uint32_t EmmcTxDataDelay2RegValue;
              : 	uint32_t EmmcRxCmdDataDelay1RegValue;
              : 	uint32_t EmmcRxCmdDataDelay2RegValue;
              : 	uint32_t EmmcRxStrobeDelayRegValue;
> No, FSP would be programming the same set of registers. […]

Ack

https://review.coreboot.org/c/coreboot/+/37783/22/src/soc/intel/tigerlake/ch... 
PS22, Line 145: SdCardPowerEnableActiveHigh
> Ok, sounds good.

Ack

https://review.coreboot.org/c/coreboot/+/37783/30/src/soc/intel/tigerlake/ch... 
File src/soc/intel/tigerlake/chip.c:

https://review.coreboot.org/c/coreboot/+/37783/30/src/soc/intel/tigerlake/ch... 
PS30, Line 91: /* Keeping ACPI device name coherent with ec.asl */
> I believe this comment was intentional.

Ack