[coreboot-gerrit] [XL] Change in coreboot[master]: soc/intel/xeon_sp: Rename nb_acpi.c and add SPR-SP support

[build bot (Jenkins) (Code Review)]

Attention is currently required from: TimLiu-SMCI, Jonathan Zhang, Johnny Lin, Christian Walter, Jian-Ming Wang, Shelly Chang.

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71958 )

Change subject: soc/intel/xeon_sp: Rename nb_acpi.c and add SPR-SP support
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Patch Set 7:

(3 comments)

File src/soc/intel/xeon_sp/uncore_acpi.c:

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169712):
https://review.coreboot.org/c/coreboot/+/71958/comment/ca4aafe5_9db4c2fb 
PS7, Line 139: 		dev = (pds.pds[i].device_handle >> 15 ) & 0x1f;
space prohibited before that close parenthesis ')'

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169712):
https://review.coreboot.org/c/coreboot/+/71958/comment/a9bd3e31_fe8fa3dd 
PS7, Line 140: 		func = (pds.pds[i].device_handle >> 12 ) & 0x07;
space prohibited before that close parenthesis ')'

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-169712):
https://review.coreboot.org/c/coreboot/+/71958/comment/f828ec83_234a2ef9 
PS7, Line 527: 						if (pciexp_find_extended_cap(dev, PCIE_EXT_CAP_ID_ATS, 0)) {
Too many leading tabs - consider code refactoring