Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/22628
Change subject: mb/google/poppy/variants/soraka: Set PCH thermal trip point as 75 degreeC ......................................................................
mb/google/poppy/variants/soraka: Set PCH thermal trip point as 75 degreeC
PMC logic shuts down the thermal sensor when CPU is in a C-state and DTS Temp <= Low Temp Threshold in case Dynamic Thermal Shutdown in S0ix is enabled.
BUG=b:69110373 BRANCH=none TEST=Ensures Thermal Device(B0: D20: F2) TSPM offset 0x1c[LTT (8:0)] value is 0xFA.
Change-Id: I6246300a4376a0194950d4de277af040b10b6c1f Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/mainboard/google/poppy/variants/soraka/devicetree.cb 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/22628/1
diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index 14c2b06..db3f2a2 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -265,6 +265,9 @@ # Lock Down register "chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT"
+ # PCH Trip Temperature in degree C + register "pch_trip_temp" = "75" + device cpu_cluster 0 on device lapic 0 on end end