Kyösti Mälkki (kyosti.malkki@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5229
-gerrit
commit 6dd34b07b51ceea1036a5a29a2d7cf10222fc035 Author: Kyösti Mälkki kyosti.malkki@gmail.com Date: Mon Feb 17 19:37:52 2014 +0200
uart8250: Fix and unify baudrate divisor calculation
Divisor is a function of requested baudrate, platform-specific reference clock and amount of oversampling done on the UART reference. Calculate this parameter with divisor rounded to nearest integer.
When building without option_table or when there is no entry for baud_rate, CONFIG_TTYS0_BAUD is used for default baudrate.
For OxPCIe use of 4 MHz for reference was arbitrary giving correct divisor for 115200 but somewhat inaccurate for lower baudrates. Actual hardware is 62500000 with 16 times oversampling.
FIXME: Field for baudrate in lb_tables is still incorrect.
Change-Id: I68539738469af780fadd3392263dd9b3d5964d2d Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- src/arch/x86/lib/romcc_console.c | 1 + src/drivers/oxford/oxpcie/oxpcie_early.c | 10 ++++++- src/drivers/uart/Makefile.inc | 6 ++++ src/drivers/uart/util.c | 48 ++++++++++++++++++++++++++++++++ src/include/uart.h | 17 +++++++++++ src/include/uart8250.h | 4 --- src/lib/uart8250.c | 36 +++++++----------------- src/lib/uart8250mem.c | 25 ++--------------- 8 files changed, 93 insertions(+), 54 deletions(-)
diff --git a/src/arch/x86/lib/romcc_console.c b/src/arch/x86/lib/romcc_console.c index db84f9e..c5e6882 100644 --- a/src/arch/x86/lib/romcc_console.c +++ b/src/arch/x86/lib/romcc_console.c @@ -32,6 +32,7 @@ #endif
#if CONFIG_CONSOLE_SERIAL8250 +#include "drivers/uart/util.c" #include "lib/uart8250.c" #endif #if CONFIG_CONSOLE_NE2K diff --git a/src/drivers/oxford/oxpcie/oxpcie_early.c b/src/drivers/oxford/oxpcie/oxpcie_early.c index d04e9d4..4f6f964 100644 --- a/src/drivers/oxford/oxpcie/oxpcie_early.c +++ b/src/drivers/oxford/oxpcie/oxpcie_early.c @@ -21,6 +21,7 @@ #include <arch/io.h> #include <arch/early_variables.h> #include <delay.h> +#include <uart.h> #include <uart8250.h> #include <device/pci_def.h>
@@ -116,7 +117,14 @@ void oxford_init(void) /* Now the UART initialization */ u32 uart0_base = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000;
- uart8250_mem_init(uart0_base, (4000000 / CONFIG_TTYS0_BAUD)); + unsigned int div = uart_baudrate_divisor(default_baudrate(), + uart_platform_refclk(), 16); + uart8250_mem_init(uart0_base, div); }
#endif + +unsigned int uart_platform_refclk(void) +{ + return 62500000; +} diff --git a/src/drivers/uart/Makefile.inc b/src/drivers/uart/Makefile.inc new file mode 100644 index 0000000..c797d4b --- /dev/null +++ b/src/drivers/uart/Makefile.inc @@ -0,0 +1,6 @@ +ifeq ($(CONFIG_CONSOLE_SERIAL),y) +romstage-y += util.c +ramstage-y += util.c +bootblock-y += util.c +smm-y += util.c +endif diff --git a/src/drivers/uart/util.c b/src/drivers/uart/util.c new file mode 100644 index 0000000..c577048 --- /dev/null +++ b/src/drivers/uart/util.c @@ -0,0 +1,48 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <console/console.h> +#include <uart.h> +#if CONFIG_USE_OPTION_TABLE +#include <pc80/mc146818rtc.h> +#include "option_table.h" +#endif + +unsigned int default_baudrate(void) +{ +#if !defined(__SMM__) && CONFIG_USE_OPTION_TABLE + static const unsigned baud[8] = + { 115200, 57600, 38400, 19200, 9600, 4800, 2400, 1200 }; + unsigned b_index = 0; +#if defined(__PRE_RAM__) + b_index = read_option(baud_rate, 0xff); +#else + if (get_option(&b_index, "baud_rate") != CB_SUCCESS) + b_index = 0xff; +#endif + if (b_index < 8) + return baud[b_index]; +#endif + return CONFIG_TTYS0_BAUD; +} + +/* Calculate divisor. Do not floor but round to nearest integer. */ +unsigned int uart_baudrate_divisor(unsigned int baudrate, + unsigned int refclk, unsigned int oversample) +{ + return (1 + (2 * refclk) / (baudrate * oversample)) / 2; +} diff --git a/src/include/uart.h b/src/include/uart.h index b520e09..997fe18 100644 --- a/src/include/uart.h +++ b/src/include/uart.h @@ -20,6 +20,23 @@ #ifndef UART_H #define UART_H
+/* Return the clock frequency UART uses as reference clock for + * baudrate generator. */ +unsigned int uart_platform_refclk(void); + +/* Return the baudrate determined from option_table, or when that is + * not used, CONFIG_TTYS0_BAUD. + */ +unsigned int default_baudrate(void); + +/* Returns the divisor value for a given baudrate. + * The formula to satisfy is: + * refclk / divisor = baudrate * oversample + */ +unsigned int uart_baudrate_divisor(unsigned int baudrate, + unsigned int refclk, unsigned int oversample); + + unsigned char uart_rx_byte(void); void uart_tx_byte(unsigned char data); void uart_tx_flush(void); diff --git a/src/include/uart8250.h b/src/include/uart8250.h index a48c948..112cd44 100644 --- a/src/include/uart8250.h +++ b/src/include/uart8250.h @@ -105,10 +105,6 @@ #define UART_SCR 0x07 #define UART_SPR 0x07
-#if ((115200 % CONFIG_TTYS0_BAUD) != 0) -#error Bad ttyS0 baud rate -#endif - #if CONFIG_CONSOLE_SERIAL8250 unsigned char uart8250_rx_byte(unsigned base_port); int uart8250_can_rx_byte(unsigned base_port); diff --git a/src/lib/uart8250.c b/src/lib/uart8250.c index aa18d2a..d136eb8 100644 --- a/src/lib/uart8250.c +++ b/src/lib/uart8250.c @@ -19,16 +19,18 @@ */
#include <arch/io.h> +#include <uart.h> #include <uart8250.h> -#include <pc80/mc146818rtc.h> #include <trace.h>
-#if CONFIG_USE_OPTION_TABLE -#include "option_table.h" -#endif - /* Should support 8250, 16450, 16550, 16550A type UARTs */
+/* Nominal values only, good for the range of choices Kconfig offers for + * set of standard baudrates. + */ +#define BAUDRATE_REFCLK (115200) +#define BAUDRATE_OVERSAMPLE (1) + /* Expected character delay at 1200bps is 9ms for a working UART * and no flow-control. Assume UART as stuck if shift register * or FIFO takes more than 50ms per character to appear empty. @@ -107,26 +109,8 @@ void uart8250_init(unsigned base_port, unsigned divisor)
void uart_init(void) { - /* TODO the divisor calculation is hard coded to standard UARTs. Some - * UARTs won't work with these values. This should be a property of the - * UART used, worst case a Kconfig variable. For now live with hard - * codes as the only devices that might be different are the iWave - * iRainbowG6 and the OXPCIe952 card (and the latter is memory mapped) - */ - unsigned int div = (115200 / CONFIG_TTYS0_BAUD); - -#if !defined(__SMM__) && CONFIG_USE_OPTION_TABLE - static const unsigned char divisor[8] = { 1, 2, 3, 6, 12, 24, 48, 96 }; - unsigned b_index = 0; -#if defined(__PRE_RAM__) - b_index = read_option(baud_rate, 0); - b_index &= 7; - div = divisor[b_index]; -#else - if (get_option(&b_index, "baud_rate") == CB_SUCCESS) - div = divisor[b_index]; -#endif -#endif - + unsigned int div; + div = uart_baudrate_divisor(default_baudrate(), BAUDRATE_REFCLK, + BAUDRATE_OVERSAMPLE); uart8250_init(CONFIG_TTYS0_BASE, div); } diff --git a/src/lib/uart8250mem.c b/src/lib/uart8250mem.c index 1482142..5e96825 100644 --- a/src/lib/uart8250mem.c +++ b/src/lib/uart8250mem.c @@ -19,11 +19,8 @@ */
#include <arch/io.h> +#include <uart.h> #include <uart8250.h> -#include <pc80/mc146818rtc.h> -#if CONFIG_USE_OPTION_TABLE -#include "option_table.h" -#endif #include <device/device.h> #include <delay.h>
@@ -95,7 +92,6 @@ void uart8250_mem_init(unsigned base_port, unsigned divisor) /* DLAB on */ write8(base_port + UART_LCR, UART_LCR_DLAB | CONFIG_TTYS0_LCS);
- /* Set Baud Rate Divisor. 12 ==> 9600 Baud */ write8(base_port + UART_DLL, divisor & 0xFF); write8(base_port + UART_DLM, (divisor >> 8) & 0xFF);
@@ -105,27 +101,11 @@ void uart8250_mem_init(unsigned base_port, unsigned divisor)
u32 uart_mem_init(void) { - unsigned uart_baud = CONFIG_TTYS0_BAUD; u32 uart_bar = 0; unsigned div;
- /* find out the correct baud rate */ -#if !defined(__SMM__) && CONFIG_USE_OPTION_TABLE - static const unsigned baud[8] = { 115200, 57600, 38400, 19200, 9600, 4800, 2400, 1200 }; - unsigned b_index = 0; -#if defined(__PRE_RAM__) - b_index = read_option(baud_rate, 0); - b_index &= 7; - uart_baud = baud[b_index]; -#else - if (get_option(&b_index, "baud_rate") == CB_SUCCESS) - uart_baud = baud[b_index]; -#endif -#endif - /* Now find the UART base address and calculate the divisor */ #if CONFIG_DRIVERS_OXFORD_OXPCIE - #if defined(MORE_TESTING) && !defined(__SIMPLE_DEVICE__) device_t dev = dev_find_device(0x1415, 0xc158, NULL); if (!dev) @@ -144,10 +124,9 @@ u32 uart_mem_init(void) #endif uart_bar = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000; // 1st UART // uart_bar = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x2000; // 2nd UART - - div = 4000000 / uart_baud; #endif
+ div = uart_baudrate_divisor(default_baudrate(), uart_platform_refclk(), 16); if (uart_bar) uart8250_mem_init(uart_bar, div);