Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42677 )
Change subject: soc/intel/tigerlake: Run pmc_set_acpi_mode() during .init in pmc_ops ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42677/5/src/soc/intel/tigerlake/pmc... File src/soc/intel/tigerlake/pmc.c:
https://review.coreboot.org/c/coreboot/+/42677/5/src/soc/intel/tigerlake/pmc... PS5, Line 146: PMC initialization happens earlier for this SoC
Tim, would you please help to improve the comment here? I just copy the comment from cannolake pmc. […]
This PMC device is intentionally hide to avoid PCI enumeration. the idea of PCI enumeration is to allocate the DRAM based resources for its MMIO and IO BAR and override the SPI mapped/temp BAR.
Here for PMC device, we don't like to let those resource been overridden hence inside FSP-S, we have made this device disable, if anyone overrides those fixed BAR, the behavior is not known.
1. BB assign PMC BAR MMIO/IO 2. FSP-S make PMC hidden (masked VID/DID) 3. Coreboot publish API to access MMIO/IO resources directly without probing the device from bus 4. PCI enumeration don't see this device PCI: Static device PCI: 00:1f.2 not found, disabling it. 5. You don't see this device in PCI enumeration hence init won't get called as VID/DID would be 0xFFFF
i don't see how init() is getting called here https://review.coreboot.org/c/coreboot/+/41384/11/src/device/pci_device.c?an... pointer ?