[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/apollolake: Override GLK usb clock gating register

[John Zhao (Code Review)]

John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30918 )

Change subject: soc/intel/apollolake: Override GLK usb clock gating register
......................................................................

Patch Set 2:

(1 comment)

https://review.coreboot.org/#/c/30918/2/src/soc/intel/apollolake/chip.c 
File src/soc/intel/apollolake/chip.c:

https://review.coreboot.org/#/c/30918/2/src/soc/intel/apollolake/chip.c@776 
PS2, Line 776: 			reg = 0x0FCE6E5F;
> How was this value determined? I would like to know the magic behind magic values.

Along with usb modPhy tuned data, this xHCI register BIOS setting is provided by USB COE. The design specification describe all bits setting for the clock gating register in detail,