Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32753
Change subject: mb/lenovo/s230u: Rewrite trigger inversion ACPI code ......................................................................
mb/lenovo/s230u: Rewrite trigger inversion ACPI code
The GPIO invert registers are already defined in the PCH code, so just use the 8-bit versions of the registers instead of creating a new GPIO field for the single bits.
This allows us to get rid of the Field(GPIO...) code that's causing problems with IASL version 20190509.
Signed-off-by: Martin Roth martinroth@chromium.org Change-Id: Iac5dfb71b3a2b5a25c05a403cf5f403c7acecaaf --- M src/mainboard/lenovo/s230u/acpi/gpe.asl 1 file changed, 12 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/32753/1
diff --git a/src/mainboard/lenovo/s230u/acpi/gpe.asl b/src/mainboard/lenovo/s230u/acpi/gpe.asl index a69f562..41540a1 100644 --- a/src/mainboard/lenovo/s230u/acpi/gpe.asl +++ b/src/mainboard/lenovo/s230u/acpi/gpe.asl @@ -16,15 +16,6 @@
Scope (_GPE) { - Field(GPIO, ByteAcc, NoLock, Preserve) - { - Offset(0x2c), // GPIO Invert - , 2, - GV02, 1, - , 1, - GV04, 1, - } - Name (PDET, Zero) Method (PNOT, 2, Serialized) { ShiftLeft (Arg0, Arg1, Local0) @@ -39,10 +30,20 @@ } }
+ Method (TINV, 2, Serialized) { + ShiftLeft (One, Arg1, Local0) + If (LEqual (Arg0, Zero)) { + Not (Local0, Local0) + And (GIV0, local0, GIV0) + } Else { + Or (GIV0, local0, GIV0) + } + } + /* Palm detect sensor 1 */ Method (_L12, 0, NotSerialized) { // Invert trigger - Store(GP02, GV02) + TINV(GP02, 2)
PNOT (GP02, 0) } @@ -50,7 +51,7 @@ /* Palm detect sensor 2 */ Method (_L14, 0, NotSerialized) { // Invert trigger - Store(GP04, GV04) + TINV(GP04, 4)
PNOT (GP04, 1) }