Vladimir Serbinenko (phcoder@gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13512
-gerrit
commit bdddeb28ee89523446e800255abc566b549d131f Author: Vladimir Serbinenko phcoder@gmail.com Date: Fri Jan 29 19:42:02 2016 +0100
Revert "northbridge/intel/sandybridge: Fix random raminit failures"
It break x230 access to channel 1.
This reverts commit 9f1fbb9a3002e8d74d53d7973bd1c7e3d4879238.
Change-Id: I8a3b13d17729f25cea3460ac2f87bca3c193d388 Signed-off-by: Vladimir Serbinenko phcoder@gmail.com --- src/northbridge/intel/sandybridge/raminit.c | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-)
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index 151a7ec..8a287c1 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -2334,17 +2334,7 @@ static void discover_timB(ramctr_timing * ctrl, int channel, int slotrank) } FOR_ALL_LANES { struct run rn = get_longest_zero_run(statistics[lane], 128); - if (rn.start < rn.middle) { - ctrl->timings[channel][slotrank].lanes[lane].timB = rn.start; - } else { - /* In this case statistics[lane][7f] and statistics[lane][0] are - * both zero. - * Prefer a smaller value over rn.start to prevent failures in - * the following write tests. - */ - ctrl->timings[channel][slotrank].lanes[lane].timB = 0; - } - + ctrl->timings[channel][slotrank].lanes[lane].timB = rn.start; if (rn.all) die("timB discovery failed"); printram("Bval: %d, %d, %d, %x\n", channel, slotrank,