[coreboot-gerrit] [XS] Change in coreboot[main]: mb/google/nissa/var/dirks: correct usb2_ports setting

[Ivy Jian (Code Review)]

Attention is currently required from: David Wu, Dinesh Gehlot, Eric Lai, Ivy Jian, Jayvik Desai, Nick Vaccaro, Subrata Banik.

Hello David Wu, Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/87301?usp=email

to look at the new patch set (#2).

The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)

Change subject: mb/google/nissa/var/dirks: correct usb2_ports setting
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mb/google/nissa/var/dirks: correct usb2_ports setting

When re-purposing the TCSS port to USB Type-A, PortResetMessageEnable
must be enabled for USB2 ports that are paired with the CPU XHCI port.
Set to USB2_PORT_TYPE_C to enable PortResetMessageEnable.

Also remove the workaround.

BUG=b:400809281
TEST=Connecting a USB3 speed device,using lsusb -t to check enumerated status.
with change:
/:  Bus 02.Port 1: Dev 1, Class=root_hub, Driver=xhci_hcd/2p, 20000M/x2
    |__ Port 2: Dev 2, If 0, Class=Mass Storage, Driver=usb-storage, 5000M

without change:
/:  Bus 03.Port 1: Dev 1, Class=root_hub, Driver=xhci_hcd/12p, 480M
    |__ Port 2: Dev 4, If 0, Class=Mass Storage, Driver=usb-storage, 480M

Change-Id: I7c4743d1d3bcf2567fdca9c0e07ed02c240d4baf
Signed-off-by: Ivy Jian 
---
M src/mainboard/google/brya/Kconfig
M src/mainboard/google/brya/variants/dirks/overridetree.cb
2 files changed, 3 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/87301/2