[coreboot-gerrit] Change in coreboot[master]: FSP2.0 platforms: Use bootloader reserved memory for BERT

[Tim Wawrzynczak (Code Review)]

Attention is currently required from: Furquan Shaikh, Arthur Heymans, Andrey Petrov, Patrick Rudolph.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55142 )

Change subject: FSP2.0 platforms: Use bootloader reserved memory for BERT
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Patch Set 3:

(2 comments)

File src/soc/intel/common/block/systemagent/memmap.c:

https://review.coreboot.org/c/coreboot/+/55142/comment/39e9af16_c4befe4e 
PS3, Line 40: * +---------------------------+ TOLUM / top_of_ram / cbmem_top
> update comment

Done

https://review.coreboot.org/c/coreboot/+/55142/comment/cc575205_cfb08c8e 
PS3, Line 61: *start = cbmem_top();
            : 	*size = CONFIG_ACPI_BERT_SIZE;
> Just wondering: this ends up being UC instead of WB: see systemagent.c 'top_of_ram -> TOLUD'. […]

Yeah that makes sense to me, the extra MTRR is not necessary

`MTRR: 1 base 0x0000000076ff0000 mask 0x00003fffffff0000 type 0`
is what I got on my machine for that region, next patch will account for that