[coreboot-gerrit] Change in coreboot[master]: ec/starlabs: Store the correct value for TPLE when suspending

[Sean Rhodes (Code Review)]

Sean Rhodes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/62604 )

Change subject: ec/starlabs: Store the correct value for TPLE when suspending
......................................................................

ec/starlabs: Store the correct value for TPLE when suspending

The current code will read the raw value from the EC, which doesn't
match the respective setting in CMOS.

Switch argument will store the correct value.

Signed-off-by: Sean Rhodes 
Change-Id: I921be8aea55b95f1ba233d2640d9bae80f8c3703
---
M src/ec/starlabs/merlin/acpi/suspend.asl
1 file changed, 19 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/62604/1

diff --git a/src/ec/starlabs/merlin/acpi/suspend.asl b/src/ec/starlabs/merlin/acpi/suspend.asl
index bbbd05d..68f727a 100644
--- a/src/ec/starlabs/merlin/acpi/suspend.asl
+++ b/src/ec/starlabs/merlin/acpi/suspend.asl
@@ -5,8 +5,25 @@
    If ((Arg0 == 0x04) || (Arg0 == 0x05))
    {
    	/* Store current EC settings in CMOS */
-		_SB.PCI0.LPCB.TPLC =
-			_SB.PCI0.LPCB.EC.ECRD (RefOf (_SB.PCI0.LPCB.EC.TPLE))
+		Switch (_SB.PCI0.LPCB.EC.ECRD (RefOf (_SB.PCI0.LPCB.EC.TPLE)))
+		{
+			// 0x00 == Enabled    == 0x01
+			// 0x11 == Re-enabled == 0x00
+			// 0x22 == Disabled   == 0x01
+			Case (0x00)
+			{
+				_SB.PCI0.LPCB.TPLC = 0x00
+			}
+			Case (0x11)
+			{
+				_SB.PCI0.LPCB.TPLC = 0x00
+			}
+			Case (0x22)
+			{
+				_SB.PCI0.LPCB.TPLC = 0x01
+			}
+		}
+
    	_SB.PCI0.LPCB.FLKC =
    		_SB.PCI0.LPCB.EC.ECRD (RefOf (_SB.PCI0.LPCB.EC.FLKE))
    	_SB.PCI0.LPCB.KLSC =