[coreboot-gerrit] Change in coreboot[master]: mb/google/deltaur: Provide initial devicetree

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39678 )

Change subject: mb/google/deltaur: Provide initial devicetree
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Patch Set 7:

(2 comments)

https://review.coreboot.org/c/coreboot/+/39678/4/src/mainboard/google/deltau... 
File src/mainboard/google/deltaur/variants/baseboard/devicetree.cb:

https://review.coreboot.org/c/coreboot/+/39678/4/src/mainboard/google/deltau... 
PS4, Line 74: 	register "PcieClkSrcUsage[7]" = "PCIE_CLK_NOTUSED"
> sorry, 0-6 is correct. my fault. I just checked the circuit.

Ack

https://review.coreboot.org/c/coreboot/+/39678/7/src/mainboard/google/deltau... 
File src/mainboard/google/deltaur/variants/baseboard/devicetree.cb:

https://review.coreboot.org/c/coreboot/+/39678/7/src/mainboard/google/deltau... 
PS7, Line 315: 		device pci 1d.0 on  end # PCIe Root Port #9
             : 		device pci 1d.1 off end # PCIe Root Port #10
             : 		device pci 1d.2 off end # PCIe Root Port #11
             : 		device pci 1d.3 off end # PCIe Root Port #12
> if NVMe is taking up 4 lanes, should we remove/disable Sata related settings?

I'm not sure... the HSIO map in the schematic seems to indicate that port10 & port11 would be occupied by SATA.