[coreboot-gerrit] [XS] Change in coreboot[main]: soc/amd/cezanne/chipset.cb: Enable gpp_bridge_[a/b/c] by default

[Matt DeVillier (Code Review)]

Attention is currently required from: Fred Reitberger, Jason Glenesk, Jason Nien, Martin Roth, Matt DeVillier, Maximilian Brune, Patrick Rudolph.

Matt DeVillier has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/86272?usp=email )

Change subject: soc/amd/cezanne/chipset.cb: Enable gpp_bridge_[a/b/c] by default
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Patch Set 4: Code-Review+2

(2 comments)

File src/soc/amd/cezanne/chipset.cb:

https://review.coreboot.org/c/coreboot/+/86272/comment/4a1673d0_1c904298?usp... :
PS2, Line 90: xgbe_0
> the two xgbe controllers can't be used on the silicon this was originally tested with, so i'd guess  […]

Acknowledged

https://review.coreboot.org/c/coreboot/+/86272/comment/a1326d85_8fe4b5fe?usp... :
PS2, Line 96: i2s_ac97
> uh, that's a good question to which i don't know the answer. […]

Acknowledged