Change subject: soc/intel/common/systemagent: Add new PCIEXBAR register LENGTH offset values
......................................................................
--
To view, visit
https://review.coreboot.org/c/coreboot/+/40363
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I75619be7614f58c96670ef86485d49d4da06ad91
Gerrit-Change-Number: 40363
Gerrit-PatchSet: 7
Gerrit-Owner: Usha P
usha.p@intel.com
Gerrit-Reviewer: Furquan Shaikh
furquan@google.com
Gerrit-Reviewer: Patrick Rudolph
siro@das-labor.org
Gerrit-Reviewer: Pratikkumar V Prajapati
pratikkumar.v.prajapati@intel.com
Gerrit-Reviewer: Subrata Banik
subrata.banik@intel.com
Gerrit-Reviewer: Wonkyu Kim
wonkyu.kim@intel.com
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-CC: Paul Menzel
paulepanter@users.sourceforge.net
Gerrit-Comment-Date: Mon, 04 May 2020 16:48:26 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment