Meera Ravindranath has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43673 )
Change subject: soc/intel/jasperlake: Fix PMC_GPE_DW mapping ......................................................................
soc/intel/jasperlake: Fix PMC_GPE_DW mapping
PMC_GPE_DW mapping was not configured correctly and hence coreboot skipped programming Tier 1 GPIOs resulting in failure of S3 wake from Trackpad.
TEST=System should wake from S3 via trackpad
Change-Id: I59ce3720e0ffeefb2c9440bb300689def80211ea Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com --- M src/soc/intel/jasperlake/gpio.c M src/soc/intel/jasperlake/include/soc/pmc.h 2 files changed, 11 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/43673/1
diff --git a/src/soc/intel/jasperlake/gpio.c b/src/soc/intel/jasperlake/gpio.c index 3b3b262..397d668 100644 --- a/src/soc/intel/jasperlake/gpio.c +++ b/src/soc/intel/jasperlake/gpio.c @@ -189,7 +189,8 @@ { PMC_GPD, GPP_GPD }, { PMC_GPP_C, GPP_C }, { PMC_GPP_E, GPP_E }, - { PMC_GPP_F, GPP_F } + { PMC_GPP_F, GPP_F }, + { PMC_GPP_G, GPP_G } };
*num = ARRAY_SIZE(routes); diff --git a/src/soc/intel/jasperlake/include/soc/pmc.h b/src/soc/intel/jasperlake/include/soc/pmc.h index 5954a31..9eaa812 100644 --- a/src/soc/intel/jasperlake/include/soc/pmc.h +++ b/src/soc/intel/jasperlake/include/soc/pmc.h @@ -102,16 +102,17 @@ #define GPE0_DWX_MASK 0xf #define GPE0_DW_SHIFT(x) (4*(x))
-#define PMC_GPP_A 0x0 +#define PMC_GPP_G 0x0 #define PMC_GPP_B 0x1 -#define PMC_GPP_F 0x2 -#define PMC_GPD 0x3 -#define PMC_GPP_R 0x4 -#define PMC_GPP_S 0x6 +#define PMC_GPP_A 0x2 +#define PMC_GPP_R 0x3 +#define PMC_GPP_S 0x4 +#define PMC_GPD 0x5 +#define PMC_GPP_H 0x6 #define PMC_GPP_D 0x7 -#define PMC_GPP_C 0x8 -#define PMC_GPP_H 0xA -#define PMC_GPP_E 0xF +#define PMC_GPP_F 0x8 +#define PMC_GPP_C 0xA +#define PMC_GPP_E 0xB
#define GBLRST_CAUSE0 0x1924 #define GBLRST_CAUSE0_THERMTRIP (1 << 5)