Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44709 )
Change subject: soc/mediatek/mt8192: Add dramc 8 phase calibration ......................................................................
Patch Set 48:
(5 comments)
Final 2 nits
https://review.coreboot.org/c/coreboot/+/44709/43/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_calibration_api.c:
https://review.coreboot.org/c/coreboot/+/44709/43/src/soc/mediatek/mt8192/dr... PS43, Line 358: = 0xff
Similar to ph_dly_loop_break, I'd prefer doing initialization within dramc_8_phase_cal_find_best_dly […]
Done
https://review.coreboot.org/c/coreboot/+/44709/46/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_calibration_api.c:
https://review.coreboot.org/c/coreboot/+/44709/46/src/soc/mediatek/mt8192/dr... PS46, Line 257: static
err_code_min may be assigned to a new value, so only use static modifier.
Ack. Sorry, I must have missed that.
https://review.coreboot.org/c/coreboot/+/44709/46/src/soc/mediatek/mt8192/dr... PS46, Line 331: 1
Means exit the 8 phase detect loop or not.
Ack
https://review.coreboot.org/c/coreboot/+/44709/48/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_calibration_api.c:
https://review.coreboot.org/c/coreboot/+/44709/48/src/soc/mediatek/mt8192/dr... PS48, Line 349: d u
https://review.coreboot.org/c/coreboot/+/44709/48/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/dramc_pi_api.h:
https://review.coreboot.org/c/coreboot/+/44709/48/src/soc/mediatek/mt8192/in... PS48, Line 37: define One space (not tab) after "define"