[coreboot-gerrit] Change in coreboot[master]: mb/google/zork/vilboz: Enable P sensor

[Peichao Li (Code Review)]

Peichao Li has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43665 )

Change subject: mb/google/zork/vilboz: Enable P sensor
......................................................................

mb/google/zork/vilboz: Enable P sensor

BUG=b:161759253
TEST=flash the BIOS and insure firmware node will be generate
under the OS.

Signed-off-by: Peichao.Wang 
Change-Id: I5e1a864bc156b434c39e8027fedf3a435757c1a7
---
M src/mainboard/google/zork/variants/vilboz/gpio.c
M src/mainboard/google/zork/variants/vilboz/overridetree.cb
2 files changed, 9 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/43665/1

diff --git a/src/mainboard/google/zork/variants/vilboz/gpio.c b/src/mainboard/google/zork/variants/vilboz/gpio.c
index 4d292c2..29be3ae 100644
--- a/src/mainboard/google/zork/variants/vilboz/gpio.c
+++ b/src/mainboard/google/zork/variants/vilboz/gpio.c
@@ -9,6 +9,8 @@
 static const struct soc_amd_gpio lte_gpio_set_stage_ram[] = {
    /* LTE POWER ENABLE */
    PAD_GPO(GPIO_32, HIGH),
+	/* P sensor INT */
+	PAD_SCI(GPIO_40, PULL_NONE, EDGE_LOW),
 };

diff --git a/src/mainboard/google/zork/variants/vilboz/overridetree.cb b/src/mainboard/google/zork/variants/vilboz/overridetree.cb
index 49d21d5..63d3f7d 100644
--- a/src/mainboard/google/zork/variants/vilboz/overridetree.cb
+++ b/src/mainboard/google/zork/variants/vilboz/overridetree.cb
@@ -111,5 +111,12 @@
    		register "hid_desc_reg_offset" = "0x20"
    		device i2c 2c on end
    	end
+		chip drivers/i2c/generic
+			register "hid" = ""STH9324""
+			register "name" = ""SEMTECH SX9324""
+			register "desc" = ""SAR Proximity Sensor""
+			register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_40)"
+			device i2c 28 on end
+		end
    end
 end	# chip soc/amd/picasso