Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Fred Reitberger, Felix Held.
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71614 )
Change subject: [WIP] soc/amd: Change CPU ASL for p-states
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Patch Set 1:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/71614/comment/4e70a8aa_5e899e01
PS1, Line 13: (SB900_)ACPI_IO_BASE named ACPI_CPU_CONTROL.
https://review.coreboot.org/c/coreboot/+/53/1/src/southbridge/amd/cimx/sb900...
File src/soc/amd/common/block/include/amdblocks/acpi.h:
https://review.coreboot.org/c/coreboot/+/71614/comment/4da1af39_4495853a
PS1, Line 20: #define MMIO_ACPI_GPE0_BLK 0x14
We have offsets 0x0c/0x14 here, 0x10/0x20 in IO space. Is this intentional?
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