[coreboot-gerrit] Change in coreboot[master]: soc/intel/xeon_sp: Add PCH lockdown

[Stefan Reinauer (Code Review)]

Attention is currently required from: Marc Jones, Furquan Shaikh, Martin Roth, Jonathan Zhang, Johnny Lin, Rocky Phagura, Angel Pons, Patrick Rudolph.
Stefan Reinauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49849 )

Change subject: soc/intel/xeon_sp: Add PCH lockdown
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Patch Set 4: Code-Review+1

(1 comment)

File src/soc/intel/common/pch/Kconfig:

https://review.coreboot.org/c/coreboot/+/49849/comment/10f1a1e3_d5bd206d 
PS4, Line 21:  if !XEON_SP_COMMON_BASE
Is there a better way to categorize this, or to have a set of convenience groups for these options? This is one of the many many ways in which this common code mess is broken.DSP, graphics, LPSS etc are not just missing on XEON_SP. Graphics is most likely missing on everything that's servers.

We could have groups for 
- SERVER
- DESKTOP
- MOBILE

or (cleaner), have each SOC/chipset actually select the blocks they need.
The advantage of the second solution would be that we also find messed up dependencies in this code more easily. E.G. The GPIO code is by no means generic to a large nunmber of Intel SOCs.