Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39674 )
Change subject: mb/google/deltaur: Add initial GPIO configuration ......................................................................
Patch Set 2:
(1 comment)
Patch Set 2:
(1 comment)
Patch Set 2:
(1 comment)
@Furquan, this is use for disable channel not dimm1 only. I would like to talk with Sabrata for export this 😊
For
https://review.coreboot.org/c/coreboot/+/39674/2/src/mainboard/google/deltau... File src/mainboard/google/deltaur/variants/baseboard/gpio.c:
https://review.coreboot.org/c/coreboot/+/39674/2/src/mainboard/google/deltau... PS2, Line 474: * TODO: I don't see the correct UPDs available in the partial headers
This feature is for disable channel.. […]
Disabling of channel can be done by passing in half-populated flag into meminit_lpddr4x_dimm0(): https://review.coreboot.org/cgit/coreboot.git/tree/src/soc/intel/tigerlake/i...
Based on that half_populated flag (which means only 1 channel is used), SoC code sets up SPD and channel disabling accordingly here: https://review.coreboot.org/cgit/coreboot.git/tree/src/soc/intel/tigerlake/m...
P.S.: As per TGL EDS, it is possible to only disable logical channel1 and not logical channel0.