[coreboot-gerrit] Change in coreboot[master]: WIP:src/amd/common: Detect SOC type before access SPI 0x2C

[Bao Zheng (Code Review)]

Hello Zheng Bao,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/48955

to review the following change.

Change subject: WIP:src/amd/common: Detect SOC type before access SPI 0x2C
......................................................................

WIP:src/amd/common: Detect SOC type before access SPI 0x2C

Change-Id: Id493597b3854296a285d2337b7cf9fd01394d169
Signed-off-by: Zheng Bao 
---
M src/soc/amd/common/block/spi/fch_spi.c
1 file changed, 2 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/48955/1

diff --git a/src/soc/amd/common/block/spi/fch_spi.c b/src/soc/amd/common/block/spi/fch_spi.c
index c39147a..910521a 100644
--- a/src/soc/amd/common/block/spi/fch_spi.c
+++ b/src/soc/amd/common/block/spi/fch_spi.c
@@ -60,6 +60,7 @@
 {
    lpc_enable_spi_rom(SPI_ROM_ENABLE);
    lpc_enable_spi_prefetch();
-	fch_spi_disable_4dw_burst();
+	if (!CONFIG(SOC_AMD_CEZANNE))
+		fch_spi_disable_4dw_burst();
    fch_spi_config_modes();
 }