[coreboot-gerrit] Change in coreboot[master]: soc/mediatek: dsi: Fix EoTp flag

[Hung-Te Lin (Code Review)]

Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48868 )

Change subject: soc/mediatek: dsi: Fix EoTp flag
......................................................................

soc/mediatek: dsi: Fix EoTp flag

SoC will transmit the EoTp (End of Transmission packet) when
MIPI_DSI_MODE_EOT_PACKET flag is set.

Enabling EoTp will make the line time larger, so the hfp and
hbp should be reduced to keep line time.

BUG=b:168728787
BRANCH=kukui
TEST=Display is normal on Kukui

Signed-off-by: Shaoming Chen 
Change-Id: Ifadd0def13cc264e9d39ab9c981fbdc996396bfa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48868
Tested-by: build bot (Jenkins) 
Reviewed-by: Yu-Ping Wu 
---
M src/soc/mediatek/common/dsi.c
M src/soc/mediatek/common/include/soc/dsi_common.h
2 files changed, 15 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Yu-Ping Wu: Looks good to me, approved

diff --git a/src/soc/mediatek/common/dsi.c b/src/soc/mediatek/common/dsi.c
index 2505bbc..8254dc5 100644
--- a/src/soc/mediatek/common/dsi.c
+++ b/src/soc/mediatek/common/dsi.c
@@ -154,8 +154,11 @@
    	break;
    }

-	tmp_reg |= (mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) << 6;
-	tmp_reg |= (mode_flags & MIPI_DSI_MODE_EOT_PACKET) >> 3;
+	if (mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)
+		tmp_reg |= NON_CONTINUOUS_CLK;
+
+	if (!(mode_flags & MIPI_DSI_MODE_EOT_PACKET))
+		tmp_reg |= EOTP_DISABLE;

write32(&dsi0->dsi_txrx_ctrl, tmp_reg);
 }
@@ -202,6 +205,10 @@
    		  phy_timing->da_hs_zero + phy_timing->da_hs_exit + 3;

u32 delta = 12;
+
+	if (mode_flags & MIPI_DSI_MODE_EOT_PACKET)
+		delta += 2;
+
    if (mode_flags & MIPI_DSI_MODE_VIDEO_BURST)
    	delta += 6;

diff --git a/src/soc/mediatek/common/include/soc/dsi_common.h b/src/soc/mediatek/common/include/soc/dsi_common.h
index 7bacec1..aebe62a 100644
--- a/src/soc/mediatek/common/include/soc/dsi_common.h
+++ b/src/soc/mediatek/common/include/soc/dsi_common.h
@@ -118,6 +118,12 @@
    MIX_MODE = BIT(17)
 };

+/* DSI_TXRX_CTRL */
+enum {
+	EOTP_DISABLE = BIT(6),
+	NON_CONTINUOUS_CLK = BIT(16),
+};
+
 /* DSI_PSCTRL */
 enum {
    DSI_PS_WC = 0x3fff,