Marshall Dawson has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/33268 )
Change subject: sb/amd/sb700: Fix misleading formatting ......................................................................
sb/amd/sb700: Fix misleading formatting
Change-Id: I65872d6f1d71d050c8589d3616340648cf95048b Signed-off-by: Marshall Dawson marshalldawson3rd@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/33268 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-by: Felix Held felix-coreboot@felixheld.de Reviewed-by: Martin Roth martinroth@google.com Reviewed-by: HAOUAS Elyes ehaouas@noos.fr --- M src/southbridge/amd/sb700/sm.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Kyösti Mälkki: Looks good to me, approved Martin Roth: Looks good to me, approved Felix Held: Looks good to me, approved HAOUAS Elyes: Looks good to me, but someone else must approve
diff --git a/src/southbridge/amd/sb700/sm.c b/src/southbridge/amd/sb700/sm.c index 6b7ce68..6631682 100644 --- a/src/southbridge/amd/sb700/sm.c +++ b/src/southbridge/amd/sb700/sm.c @@ -306,7 +306,7 @@ } byte = pci_read_config8(dev, 0xAE); if (CONFIG(ENABLE_APIC_EXT_ID)) - byte |= 1 << 4; + byte |= 1 << 4; byte |= 1 << 5; /* ACPI_DISABLE_TIMER_IRQ_ENHANCEMENT_FOR_8254_TIMER */ byte |= 1 << 6; /* Enable arbiter between APIC and PIC interrupts */ pci_write_config8(dev, 0xAE, byte);